Reset Signal Generation Using Offset Clock Phase Detection
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Solution Overview
Problem
Existing systems for synchronizing signals, such as in display devices, often require complex circuitry like phase-locked loops to detect and stabilize signals, which can be inefficient and costly to implement.
Innovation Solution
A system and method that generates a reset signal by creating an offset clock with a predetermined frequency offset relative to an input clock signal, detecting periodic phase shifts between the two, and using this information to trigger a sweep generator for locking eye patterns on a display, thereby synchronizing the signal without the need for complex PLLs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex circuitry like phase-locked loops is used to detect and stabilize signals, then signal synchronization reliability is improved, but device complexity and implementation cost increase
Solution Approach 1:
The patent extracts the essential function of signal synchronization from the complex PLL circuitry and implements it using a simplified approach: generating an offset clock signal with a predetermined frequency offset, detecting periodic phase shifts between the offset clock and input clock, and using this detection to trigger sweep generator reset. This removes unnecessary complexity while retaining the core synchronization capability.
Solution Approach 2:
The invention replaces expensive, complex PLL circuitry with simpler, more cost-effective components that can achieve the same synchronization function. The offset clock generator and phase shift detector use basic digital logic elements rather than sophisticated analog circuitry, reducing implementation cost and complexity.
2Measurement precision
If phase-locked loops are used for signal stabilization, then measurement precision is improved, but ease of manufacture deteriorates
Solution Approach 1:
The patent segments the signal stabilization function into discrete, manageable components: an offset clock generator that creates a frequency-offset signal, a phase shift detector that identifies periodic alignments, and a sweep trigger mechanism. This segmentation makes the system easier to manufacture while maintaining detection precision through the structured approach to phase comparison.
Solution Approach 2:
The invention changes the operating parameters by using an offset clock signal with a predetermined frequency offset rather than attempting to directly lock to the input clock frequency. This parameter change simplifies the manufacturing process by avoiding the need for precise frequency matching circuitry while still achieving accurate signal synchronization through periodic phase shift detection.
3Stability of the object's composition
If complex synchronization circuitry is implemented, then signal stability is improved, but productivity and implementation efficiency decrease
Solution Approach 1:
The patent applies preliminary action by pre-generating an offset clock signal with a predetermined frequency offset before the synchronization process begins. This offset clock is ready in advance to detect periodic phase shifts with the input clock, eliminating the need for complex real-time frequency adjustment and improving implementation efficiency while maintaining signal stability.
Solution Approach 2:
The synchronization system uses self-service by allowing the offset clock signal to naturally produce periodic phase shifts with the input clock signal. These periodic phase shifts automatically trigger the sweep generator reset without requiring complex control logic, thereby improving productivity and implementation efficiency while maintaining stable signal synchronization.
Data Source
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AI summary
Systems and methods are provided to generate a reset signal, such as to facilitate synchronization. In one embodiment, a system to generate a reset signal includes an offset generator that provides an offset clock signal having a frequency offset relative to a frequency of an input clock signal. A reset generator generates the reset signal in response to detecting a periodic phase shift between the offset clock signal and the input clock signal.