Residue Amplifier Gain Calibration with Uneven Flash ADC Thresholds
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Solution Overview
Problem
Pipeline analog digital converters face inaccuracies in residue amplifier gain, leading to nonlinearity issues and damage to ADC performance due to over-range intervals, especially when input signals are close to sub-range edges, and the use of fewer over-ranges restricts wafer area and power variation.
Innovation Solution
A gain calibration device and method for ADC residue amplifiers, featuring a digital-to-analog converter (DAC) and flash ADC with unevenly distributed comparators, allowing for gain calibration within a smaller sub-range without reducing the dynamic range, and a calibration module for accurate gain correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If over-range intervals are embedded to compensate for comparator threshold voltage offset, then comparator offset compensation is improved, but ADC performance deteriorates due to nonlinearity when input signals are close to sub-range edges
Solution Approach 1:
The patent extracts the gain calibration function from the normal signal path by using a dedicated calibration mode. During calibration, the residue amplifier gain is adjusted using test signals and feedback, separating the calibration operations from regular conversion operations. This eliminates the interference between calibration and normal operation, resolving the contradiction between offset compensation and ADC performance.
Solution Approach 2:
The patent performs gain calibration of the residue amplifier before normal conversion operations begin. By preliminarily adjusting the residue amplifier gain to the correct value, the system ensures that subsequent conversions operate with accurate gain without needing to continuously adjust during signal processing, thus avoiding performance degradation.
2Area of stationary object
If fewer over-ranges are used to compensate for comparator offset, then wafer area and power variation restrictions are reduced, but gain calibration accuracy deteriorates
Solution Approach 1:
The patent replaces the mechanical approach of using multiple over-range intervals with an electronic feedback-based gain calibration system. Instead of relying on physical comparator offset compensation through additional voltage ranges, the system uses digital feedback and adjustment mechanisms to achieve accurate gain calibration, thereby reducing the need for extensive over-range intervals while maintaining calibration accuracy.
Solution Approach 2:
The patent implements a feedback mechanism where the output of the residue amplifier is fed back to adjust its gain during calibration mode. This closed-loop feedback system allows for precise gain adjustment without requiring multiple over-range intervals, achieving accurate calibration with fewer comparators and reduced wafer area while maintaining high calibration accuracy.
3Measurement precision
If conventional gain calibration with calibration signal is used, then residue amplifier gain can be estimated, but output linearity deteriorates due to nonlinearity in over-range intervals
Solution Approach 1:
The patent makes the residue amplifier dynamically adjustable by implementing a variable gain control mechanism. During calibration mode, the gain is adjusted to the correct value, and during normal operation, the amplifier maintains this calibrated gain setting. This dynamic adjustment capability allows the system to achieve both accurate gain estimation and maintain output linearity by ensuring operations occur within the linear range.
Solution Approach 2:
The patent segments the operation into distinct calibration mode and normal conversion mode. During calibration, test signals are used to measure and adjust gain, while during normal operation, the calibrated amplifier processes actual signals. This segmentation prevents the calibration signal from interfering with signal linearity and ensures that normal operations always occur within the optimal linear range of the amplifier.
Data Source
AI summary
A gain calibration device for an ADC residue amplifier includes a DAC and a flash ADC. The DAC is configured to convert the digital signal to an analog signal, and the DAC includes a calibration module used in the gain calibration of the ADC residual amplifier. The flash ADC is configured to generate a digital signal, the flash ADC includes a plurality of comparators, the total number of the plurality of comparators is equal to the number of output bits of the flash ADC, and the comparators are configured to be unevenly distributed in an input range.