Resilient Carrier Aligning Microelectronic Devices for Parallel Testing

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Solution Overview

Problem

The semiconductor industry faces inefficiencies in testing and burn-in processes due to the reliance on individual sockets and mechanical apparatuses, which are costly and limit the ability to test complex chips in parallel, leading to increased production costs and complexity.

Innovation Solution

A carrier system with a resilient frame and flexible links allows for the alignment and testing of microelectronic devices in an array format, enabling efficient transport and contact with test sockets without the need for individual sockets, using springs to move the tray relative to the frame for precise alignment and contact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If individual sockets are used for testing each chip, then testing can be performed, but production costs increase and testing efficiency decreases

Engineering Contradiction:
Improvetesting efficiencyVSAvoidsocket requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple individual socket functions into a single array contactor that can test multiple chips simultaneously. The array contactor integrates numerous contact elements arranged in an array pattern, allowing parallel testing of multiple devices without requiring separate sockets for each chip, thereby improving productivity while reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The array contactor serves multiple functions: it provides electrical contact for testing, mechanical support for chips, and alignment guidance. This multi-functional design eliminates the need for dedicated individual sockets, reducing device complexity while maintaining high testing efficiency through parallel operation capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If full wafer contactors are used for parallel testing, then testing speed improves, but cost and performance limitations prevent practical use for complex chips

Engineering Contradiction:
Improveparallel testing capabilityVSAvoidcontactor complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention segments the full wafer contactor approach into a modular array contactor that can handle arrays of chips rather than entire wafers. This segmentation allows practical implementation for complex chips by processing smaller arrays in parallel, reducing the overall complexity and cost while maintaining improved productivity compared to individual socket testing.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If strip format testing is used, then individual sockets are eliminated, but alignment problems limit application to small array sizes

Engineering Contradiction:
Improvesocket eliminationVSAvoidalignment precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The array contactor introduces a new dimensional approach by arranging contact elements in a two-dimensional array pattern that matches the chip array layout. This dimensional transformation enables precise alignment across larger arrays by providing multiple alignment reference points simultaneously, overcoming the limitations of linear strip format alignment and allowing elimination of individual sockets while maintaining manufacturing precision.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution streamlines the production of semiconductor devices by reducing the need for individual sockets, enabling efficient testing and burn-in of complex chips in parallel, thereby lowering costs and improving production efficiency.

Implementation Method 1

a spring layer member which is resiliently movable relative to the base layer member between a first position in which the electronic components are received between the positioning layer member and the spring layer member, and a second position in which the electronic components are contacted by the frame layer member

Methodology Applied
Scientific EffectElastic force: Elasticity

Implementation Method 2

a carrier comprises a frame that is resiliently coupled to a tray, which frame includes two or more flexible links, for example and without limitation, springs, that are disposed so the tray may be resiliently moved relative to the frame

Methodology Applied
Scientific EffectResilient movement: Elasticity

Data Source

PatentEP2480371B1Carrier for holding microelectronic devices
Publication Date: 2017.06.28 CENTIPEDE SYSTEMS INC
  • EP2480371B1 patent drawingFigure 1A~1B
  • EP2480371B1 patent drawingFigure 2A~2C
  • EP2480371B1 patent drawingFigure 3A~3C

AI summary

One embodiment is a carrier for holding devices that includes a tray having one or more sites in which a device may be held, and a frame resiliently coupled to the tray so the tray is movable with respect to the frame.