Resilient Hashing with Multiple Hashes for ASIC Memory Optimization

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Solution Overview

Problem

Current network load balancers face memory constraints due to resilient hashing and stateful load balancing, making it impractical to build ASIC-based solutions as they exceed the memory capacity of existing ASICs, especially when handling multiple services with large maximum group sizes.

Innovation Solution

Implementing techniques such as history-based connection-server affinity, resilient hashing with multiple hashes, and resilient hashing with compression to reduce memory usage, allowing for the creation of hardware-based network load balancers by using hierarchical hash tables and compression to optimize memory efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If resilient hashing with large maximum group sizes is implemented to handle multiple services, then load balancing capability and service coverage are improved, but memory consumption increases beyond ASIC capacity

Engineering Contradiction:
Improveload balancing capabilityVSAvoidmemory consumption
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent divides the hash table into multiple segments or partitions, each handling a subset of services. Instead of maintaining one large hash table that consumes excessive memory, the system creates multiple smaller hash tables that can be managed within ASIC memory constraints. This segmentation allows the system to handle multiple services while keeping individual table sizes manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a hierarchical hash table structure where smaller hash tables are nested within or coordinated by a larger organizational structure. This nested approach allows efficient memory utilization by organizing service mappings in multiple levels, enabling the system to scale to handle many services without requiring a single monolithic hash table that would exceed ASIC memory capacity.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Speed

If ASIC-based network load balancers are built to achieve high bandwidth performance, then processing speed and bandwidth are improved, but memory capacity limitations prevent implementation of resilient hashing algorithms

Engineering Contradiction:
Improvebandwidth performanceVSAvoidmemory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent segments the resilient hashing algorithm into multiple smaller hash tables that fit within ASIC memory constraints. Each segment handles a portion of the services, allowing the ASIC to implement the algorithm with limited memory while maintaining high-speed hardware-based processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent modifies the parameters of the hash table implementation, such as reducing the maximum group size per table or adjusting hash table dimensions, to optimize for ASIC memory capacity. These parameter changes enable the algorithm to run on hardware with limited memory while still providing effective load balancing across multiple services.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If software-based network load balancers are used to implement resilient hashing, then memory capacity requirements are met, but network bandwidth performance is reduced compared to ASIC-based solutions

Engineering Contradiction:
Improvememory capacityVSAvoidnetwork bandwidth
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent optimizes hash table parameters specifically for hardware implementation, reducing memory requirements to fit ASIC capacity while maintaining algorithms that enable high-speed processing. This allows hardware-based load balancers to achieve both acceptable memory usage and superior bandwidth performance.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transitions from software-based implementation to hardware-based ASIC implementation, replacing the software execution model with dedicated hardware circuits. This substitution enables the load balancer to achieve line-rate performance and high bandwidth while using optimized, memory-efficient hash table structures that fit within ASIC constraints.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10892991B2Resilient hashing with multiple hashes
Publication Date: 2021.01.12 ARISTA NETWORKS INC
  • US10892991B2 patent drawing
  • US10892991B2 patent drawing
  • US10892991B2 patent drawing

AI summary

Techniques for implementing resilient hashing with multiple hashes are provided. In one set of embodiments, a network device can maintain a first hash table comprising mappings between a first set of hash indices and a set of bit values. The network device can also maintain a second hash table comprising mappings between a second set of hash indices and active next-hop destinations. Upon receiving a network packet, the network device can compute a first hash and can match the first hash value to a first mapping in the first hash table based on the first mapping's hash index. When the first mapping's bit value indicates that the first mapping's hash index corresponds to an active next-hop destination, the network device can further match the first hash value to a second mapping in the second hash table and send the network packet to the second mapping's active next-hop destination.