Resilient Transaction Constructs for Multi-Core Error Recovery

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Solution Overview

Problem

Modern electronic hardware, particularly multi-core computer platforms, face challenges in managing thread concurrency and recovering from hardware faults such as transient and permanent errors, which can lead to incorrect software and firmware program execution, increasing execution latency and overhead.

Innovation Solution

The implementation of resilient transaction constructs that detect and recover from errors through error-detecting and error-recovery instructions, allowing for varying levels of resiliency and minimizing execution overhead by aborting faulty transactions and rerouting execution on different cores.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware-based error correction mechanisms are implemented, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection and recovery capabilityVSAvoidhardware circuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces hardware-based error correction mechanisms with software-based error-detecting and error-recovery instructions. Instead of using additional hardware circuitry for error correction, the system uses software routines that can be executed on existing hardware, thereby maintaining reliability while reducing device complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The error-detecting and error-recovery instructions are designed to work across multiple transaction types and error conditions using a unified software approach. This multi-functional software mechanism can handle various error scenarios without requiring separate specialized hardware for each case, reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If transactional memory approaches are used, then productivity is improved through parallel execution, but loss of time increases due to synchronization overhead

Engineering Contradiction:
Improveparallel task execution capabilityVSAvoidsynchronization overhead time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs error detection and recovery actions within the transactional memory framework itself, rather than requiring external synchronization mechanisms. By integrating error handling into the transaction execution flow, the system maintains parallel productivity while minimizing synchronization overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Transactions are equipped with self-diagnostic capabilities through error-detecting instructions that can identify and handle errors autonomously within the transaction. This self-service approach reduces the need for external synchronization and coordination, thereby maintaining high productivity while reducing time loss.

Inventive Principle:
Principle #25Self-service

3Reliability

If comprehensive error protection is implemented, then reliability is improved, but loss of time increases due to error management overhead

Engineering Contradiction:
Improvefault tolerance capabilityVSAvoidexecution latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system implements error protection selectively through error-detecting and error-recovery instructions that are activated as needed during transaction execution. Rather than continuously monitoring all operations, the system applies error detection to critical points and transactions, reducing overhead time while maintaining adequate reliability.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The error protection mechanism allows for varying levels of resiliency to be applied to different transactions based on their criticality and error probability. By dynamically adjusting the level of error protection applied to different transactions, the system optimizes the balance between reliability and execution latency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8935678B2Methods and apparatus to form a resilient objective instruction construct
Publication Date: 2015.01.13 INTEL CORP
  • US8935678B2 patent drawing
  • US8935678B2 patent drawing
  • US8935678B2 patent drawing

AI summary

Methods and an apparatus to form a resilient objective instruction construct are provided. An example method obtains a source instruction construct and forms a resilient objective instruction construct by compiling one or more resilient transactions.