Resin-Encapsulated Semiconductor Device for Thin Wafer Handling
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Solution Overview
Problem
The challenge is to prevent cracking and chipping of thinner semiconductor wafers during handling and improve production efficiency without requiring advanced equipment, as the thinning of semiconductor wafers leads to increased warp and quality issues.
Innovation Solution
A resin-encapsulated semiconductor device is developed, featuring a semiconductor chip embedded in a resin encapsulation body with external terminals and a metal layer, where the resin encapsulation body covers the periphery of the chip, and a laminated film is used to enhance terminal strength and prevent easy detachment, along with a manufacturing method that includes forming a conductive layer, connecting bump electrodes, and forming a metal layer on the chip's back surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the semiconductor wafer is thinned to reduce device size, then the mounting area is reduced, but the warp increases and cracking/chipping occurs during handling
Solution Approach 1:
The patent applies beforehand cushioning by forming a resin encapsulation body that covers the semiconductor chip before handling and processing. This resin layer acts as a protective cushion that prevents cracking and chipping of the thinned semiconductor wafer during subsequent handling operations, while allowing the device to maintain its reduced size.
Solution Approach 2:
The patent uses composite materials by combining the semiconductor chip with a resin encapsulation body. This composite structure provides both the size reduction benefits of thinned wafers and the mechanical strength needed to prevent handling damage, as the resin material compensates for the fragility of thin semiconductor substrates.
2Volume of moving object
If the semiconductor wafer is thinned to reduce device size, then the mounting area is reduced, but production efficiency deteriorates due to quality problems
Solution Approach 1:
The resin encapsulation body is formed beforehand to protect the thinned semiconductor wafer, preventing quality defects that would otherwise require rework or discarding of defective chips, thereby maintaining high production efficiency despite using thinned wafers.
Solution Approach 2:
The resin encapsulation body serves multiple functions simultaneously: it protects the semiconductor chip from damage, provides structural support, and enables subsequent processing steps. This multi-functionality streamlines the manufacturing process and improves overall production efficiency.
3Reliability
If a production process with glass plate bonding is used to prevent cracking, then quality problems are solved, but advanced equipment and more manufacturing steps are required
Solution Approach 1:
The patent extracts the essential protective function from the complex glass plate bonding process and implements it through a simpler resin encapsulation method. This takes out the core benefit (protection from cracking) while eliminating the need for advanced equipment and additional manufacturing steps associated with glass plate bonding.
Solution Approach 2:
The resin encapsulation body serves as a temporary protective structure during handling and processing that can be easily applied and removed or integrated, replacing the need for expensive and complex glass plate bonding equipment and processes.
Data Source
AI summary
A resin-encapsulated semiconductor device includes a bump electrode formed on an element surface side of a semiconductor chip, a conductive layer electrically connected to the bump electrode, and a resin encapsulation body covering the semiconductor chip, the bump electrode, and the conductive layer. On a back surface of the semiconductor chip that is flush with a back surface of the resin encapsulation body, a metal layer and a laminated film are formed. The laminated film is formed on a front surface of the conductive layer, and an external terminal is arranged on an inner side of an outer edge of the semiconductor chip.


