Resin Seal Structure for Semiconductor Stacking Reliability
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Solution Overview
Problem
Conventional semiconductor devices with stacked semiconductor devices face challenges such as low non-defective ratios due to thermal warping differences, high manufacturing costs, and exposure of solder balls leading to potential short-circuits, requiring specific tools for positioning.
Innovation Solution
The semiconductor device features a resin seal portion that exposes the upper surface of the upper connection terminal, allowing easy positioning of stacked devices, with the upper connection terminal being shaped to be lower than the resin seal portion, and the resin seal portion covering the entire surface to minimize thermal warping and eliminate the need for a custom metal mold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the resin seal portion is formed to cover only the semiconductor chip area, then the manufacturing cost increases due to requiring a custom metal mold, but the solder balls remain exposed and may short-circuit
Solution Approach 1:
The resin seal portion is extended to cover the entire upper surface of the wiring substrate, serving multiple functions simultaneously: it seals the semiconductor chip, protects the solder balls from short-circuiting, and eliminates the need for a custom metal mold by using a universal full-surface sealing approach. This resolves the contradiction by making the resin seal portion multi-functional rather than limited to chip-only coverage.
Solution Approach 2:
The resin seal portion is segmented into different functional zones: a first region that covers the semiconductor chip and connection terminals, and a second region that extends to cover the entire upper surface including areas with solder balls. This segmentation allows the resin to provide both chip protection and solder ball protection without requiring a custom mold for the entire structure.
2Ease of operation
If the resin seal portion covers the entire upper surface, then the positioning of stacked devices becomes easier and thermal warping is minimized, but the upper connection terminals would be completely covered and inaccessible
Solution Approach 1:
The resin seal portion has different coverage characteristics in different regions: in the first region, it covers the semiconductor chip and connection terminals while leaving the upper surfaces of the connection terminals exposed; in the second region, it covers the entire upper surface including solder balls. This local quality differentiation ensures that connection terminals remain accessible for electrical connection while the rest of the surface is sealed for positioning and thermal stability.
Solution Approach 2:
The resin seal portion extends beyond the minimum required area for chip protection to cover the entire upper surface, but deliberately leaves the upper surfaces of the connection terminals exposed. This partial exposure approach provides excessive sealing coverage for thermal and positioning benefits while maintaining necessary accessibility for electrical connections.
3Object-generated harmful factors
If the upper connection terminals are left exposed, then they remain accessible for electrical connection, but the solder balls become exposed and may short-circuit due to foreign particles
Solution Approach 1:
The resin seal portion provides differentiated protection: it leaves the upper surfaces of the connection terminals exposed in the first region to maintain accessibility for electrical connection, while covering the solder balls in the second region to protect them from foreign particles and short-circuits. This local quality approach allows simultaneous achievement of electrical accessibility and reliability protection.
Data Source
AI summary
A method of fabricating a semiconductor device includes: mounting a semiconductor chip on a substrate; forming an upper connection terminal on a side of the substrate on which the semiconductor chip is mounted; forming a resin seal portion that seals the semiconductor chip and the upper connection terminal so that an upper surface of the upper connection terminal is exposed; and shaping the upper connection terminal so that the upper surface of the upper connection terminal becomes lower than an upper surface of the resin seal portion.