Resin Sheet Lamination for Void-Free Large-Area Circuit Boards
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Solution Overview
Problem
The production of circuit boards with large substrate areas faces challenges in forming insulating layers with high flatness and dielectric properties, as existing methods often result in interface voids and increased surface potential, leading to warpage and failure in achieving fine wiring.
Innovation Solution
A method involving the lamination of a resin sheet with a support and resin composition layer onto a substrate under reduced ambient pressure, with a total specific surface area of inorganic filler exceeding 1.5 m2/g and a surface resistivity of the support at 1.0×10^10 Ω/sq or less, to suppress interface voids and surface potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a resin sheet is used to form an insulating layer on a large substrate, then the dielectric property and flatness are improved, but interface voids are generated causing warpage and cracking
Solution Approach 1:
The patent applies parameter changes by controlling the surface resistivity of the support within a specific range (1.0×10^9 to 1.0×10^10 Ω/sq) and adjusting the ambient pressure during lamination. These parameter modifications prevent static charge accumulation while maintaining the resin sheet's ability to form a flat insulating layer, thereby resolving the contradiction between flatness and interface void prevention.
Solution Approach 2:
The patent uses a composite structure consisting of a support and a resin composition layer with specific inorganic filler content (5-50 wt%). This composite material design provides both the flatness needed for fine wiring and the electrical properties to prevent static charge, thus eliminating interface voids while maintaining manufacturing precision.
2Productivity
If the area of the substrate is increased, then the productivity is improved, but the surface potential of the support increases causing damage to semiconductor chips
Solution Approach 1:
The patent controls the surface resistivity parameter within a specific range (1.0×10^9 to 1.0×10^10 Ω/sq) that balances two requirements: it allows large substrate areas for high productivity while preventing excessive static charge accumulation that could damage semiconductor chips. This parameter optimization resolves the contradiction between productivity and harmful surface potential.
3Manufacturing precision
If the inorganic filler content is increased to suppress interface voids, then the manufacturing precision is improved, but the surface resistivity increases causing static charge damage
Solution Approach 1:
The patent optimizes the inorganic filler content parameter within a specific range (5-50 wt%) to achieve the right balance. This content level provides sufficient void suppression for manufacturing precision while keeping the surface resistivity within the safe range (1.0×10^9 to 1.0×10^10 Ω/sq) to prevent static charge damage to semiconductor chips.
Solution Approach 2:
The patent designs a composite resin composition with specifically controlled inorganic filler content (5-50 wt%) that provides both void suppression capability and appropriate electrical conductivity. This composite material formulation resolves the contradiction between manufacturing precision and harmful surface resistivity by achieving optimal filler dispersion and interaction with the resin matrix.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents interface voids and surface potential increases, enabling the formation of highly flat insulating layers with excellent dielectric properties, even on large substrates, thus facilitating further fine wiring and improved circuit board performance.
Implementation Method 1
an ambient pressure is reduced simultaneously with or prior to bonding the resin composition layer to the substrate
Implementation Method 2
the insulating layer is required to have various properties, such as an excellent dielectric property to suppress a transmission loss when operating in a high-frequency environment
Implementation Method 3
a surface resistivity of the first surface of the support is 1.0×10^10 Ω/sq. or less
Data Source
AI summary
A method for producing a circuit board which includes (X) a step of laminating a resin sheet having a support that has a first surface and a second surface and a resin composition layer formed on the second surface of the support onto a substrate so that the resin composition layer is bonded to the substrate, and satisfies the following conditions (i), (ii-1), and (ii-2):(i) an ambient pressure is reduced simultaneously with or prior to bonding the resin composition layer to the substrate;(ii-1) a total specific surface area of an inorganic filler in the resin composition layer is 1.5 m2/g or more (in terms of non-volatile components); and(ii-2) a surface resistivity of the first surface of the support is 1.0×1010 Ω/sq. or less,is capable of suppressing generation of an interface void and an increase in a surface potential of a support even when a substrate having a large area is used.