Resin Wall Design for Semiconductor Device Void Suppression
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Solution Overview
Problem
High-temperature semiconductor devices face challenges in maintaining insulating reliability due to void formation in narrow gap regions caused by the high viscosity of sealing resins with ceramic fillers, leading to reduced insulating reliability and potential deformation of wires during the sealing process.
Innovation Solution
A semiconductor device design that includes a resin wall with a greater vertical thickness than the sealing resin, restricting the flow of sealing resin and suppressing void formation on the lower surface of the lead frame, thereby enhancing insulating reliability and reducing wire deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a molding resin with high ceramic filler content is used to reduce coefficient of linear expansion, then the coefficient of linear expansion of the molding resin is reduced, but the viscosity of the molding resin is increased causing void formation in narrow gap regions
Solution Approach 1:
The patent introduces a resin wall that segments the sealing resin flow path, creating distinct flow zones. The resin wall divides the narrow gap region into sections where sealing resin flows from different directions, preventing void formation while maintaining the high-viscosity resin's low coefficient of linear expansion properties.
Solution Approach 2:
The resin wall acts as an intermediary structure between the sealing resin and the narrow gap region. It mediates the flow of high-viscosity sealing resin by providing a controlled path that ensures complete filling of the narrow gap without trapping air voids, thus maintaining both low thermal expansion and high insulating reliability.
2Stability of the object's composition
If the sealing resin has high viscosity due to ceramic fillers, then the coefficient of linear expansion is reduced, but the sealing resin cannot flow into narrow gap regions causing void formation
Solution Approach 1:
The resin wall is pre-formed in the narrow gap region before the sealing resin is applied. This preliminary structure prepares the flow path in advance, guiding the high-viscosity sealing resin to flow smoothly into the narrow gap without requiring additional processing or lowering the resin's viscosity.
3Productivity
If the sealing resin flows to the upper surface of the lead frame, then the sealing process is completed, but the resin turns around and flows to the lower surface causing void formation that reduces insulating reliability
Solution Approach 1:
The resin wall is positioned to preemptively block the sealing resin from turning around and flowing to the lower surface of the lead frame. By placing this barrier in advance, the patent prevents the harmful effect of void formation before it can occur, allowing efficient sealing without compromising insulating reliability.
Data Source
AI summary
A semiconductor device includes: semiconductor elements and; a lead frame including a mount having an upper surface over which the semiconductor elements and are mounted; a sealing resin sealing the lead frame and the semiconductor elements and so that outer leads and of the lead frame protrude outwardly; and a resin wall located on an inner lead between the outer lead and the mount of the lead frame. A vertical thickness of the resin wall is greater than a vertical thickness from a lower surface of the sealing resin to a lower end of the lead frame.