Resist Pattern Transfer With Carbon Interlayer for Lower LER

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Solution Overview

Problem

Conventional etching processes struggle with line edge roughness (LER) issues in patterned resist materials, leading to increased roughness in underlying materials during pattern transfer operations, affecting device performance and selectivity between materials.

Innovation Solution

A carbon-containing precursor is deposited on the substrate before etching, followed by hydrogen-, nitrogen-, and fluorine-containing plasma effluents to etch the underlying silicon-containing material, maintaining reduced LER and high selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If wet etching is used to achieve selective material removal, then etch selectivity is improved, but line edge roughness increases and material deformation occurs

Engineering Contradiction:
Improveetch selectivityVSAvoidline edge roughness
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

A carbon-containing material layer is deposited as an intermediary between the patterned resist and the silicon-containing layer. This carbon layer acts as a mediator that protects the resist pattern from direct plasma exposure during etching, thereby reducing line edge roughness while maintaining etch selectivity through the carbon-silicon interface

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The carbon-containing material is deposited in advance before the etching process. This preliminary deposition creates a protective interface layer that prevents plasma-induced roughening of the resist pattern during subsequent etching operations, allowing selective removal of silicon oxide without degrading the resist edge quality

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If dry etching with local plasma is used to improve trench penetration and reduce deformation, then manufacturing precision is improved, but substrate damage from electric arcs increases

Engineering Contradiction:
Improvetrench penetration qualityVSAvoidsubstrate damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The carbon-containing material layer serves as an intermediary protective barrier between the plasma source and the substrate. This layer absorbs and dissipates the energy from electric arcs and plasma discharge, preventing direct substrate damage while still allowing the plasma to effectively etch through the silicon oxide layer

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If conventional etching processes are used for pattern transfer, then productivity is maintained, but line edge roughness propagates to underlying materials affecting device performance

Engineering Contradiction:
Improvepattern transfer efficiencyVSAvoidcritical dimension uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The carbon-containing material layer acts as a protective intermediary that decouples the resist pattern from the etching plasma. This intermediary layer allows conventional etching processes to maintain high productivity while preventing plasma-induced roughening from propagating to the underlying silicon oxide and transferred patterns, thereby improving critical dimension uniformity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The carbon layer is deposited in advance to create a protective interface before etching begins. This preliminary protective layer ensures that during the pattern transfer process, the underlying materials are shielded from plasma-induced roughness, maintaining critical dimension uniformity without sacrificing etching speed or productivity

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces LER of patterned resist materials and underlying layers, ensuring uniform critical dimensions and improved selectivity during pattern transfer, enhancing the quality of semiconductor devices.

Implementation Method 1

contacting the substrate with the carbon-containing precursor. The contacting may deposit a layer of carbon-containing material on the substrate

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

providing a hydrogen-containing precursor, a nitrogen-containing precursor, or both to the processing region. The methods may include forming plasma effluents of the hydrogen-containing precursor and/or the nitrogen-containing precursor

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 3

contacting the substrate with the plasma effluents of the hydrogen-containing precursor and/or the nitrogen-containing precursor. The contacting may etch a portion of the layer of carbon-containing material to expose a portion of the layer of silicon-containing material

Methodology Applied
Scientific EffectChemical Beam Epitaxy: Chemical Beam Epitaxy

Implementation Method 4

providing a fluorine-containing precursor to the processing region. The methods may include forming plasma effluents of the fluorine-containing precursor

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 5

contacting the substrate with the plasma effluents of the fluorine-containing precursor. The contacting may etch a feature in the layer of silicon-containing material

Methodology Applied
Scientific EffectChemical Beam Epitaxy: Chemical Beam Epitaxy

Data Source

PatentUS20250112056A1Line edge roughness (LER) improvement of resist patterns
Publication Date: 2025.04.03 APPLIED MATERIALS INC
  • US20250112056A1 patent drawing
  • US20250112056A1 patent drawing
  • US20250112056A1 patent drawing

AI summary

Exemplary semiconductor processing methods may include a substrate housed in the processing region. A layer of silicon-containing material may be disposed on the substrate, a patterned resist material may be disposed on the layer of silicon-containing material, and a layer of carbon-containing material may be disposed on the patterned resist material and the layer of silicon-containing material. The methods may include providing a hydrogen-containing precursor, a nitrogen-containing precursor, or both to a processing region of a semiconductor processing chamber, forming plasma effluents of the hydrogen-containing precursor and/or the nitrogen-containing precursor, and contacting the substrate with the plasma effluents of the hydrogen-containing precursor and/or the nitrogen-containing precursor. The contacting may remove a portion of the layer of carbon-containing material. The methods may include providing a fluorine-containing precursor to the processing region, forming plasma effluents of the fluorine-containing precursor, and contacting the substrate with the plasma effluents of the fluorine-containing precursor.