Patterned Resist Protective Oxide for Semiconductor Isolation Integrity

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Solution Overview

Problem

Conventional techniques for forming patterned resist protective oxide layers in semiconductor manufacturing are not entirely satisfactory, leading to decreased product yield and reliability due to damage to features during the process, especially when trying to prevent silicidation in certain areas of the wafer.

Innovation Solution

A method involving the formation of an isolation structure, a gate stack, and a patterned resist protective oxide layer that covers the isolation and gate structures, using a masking layer to protect high-k dielectric materials during etching processes, ensuring the integrity of the semiconductor substrate and improving yield and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional techniques are used to form patterned resist protective oxide layers, then manufacturing process simplicity is maintained, but product yield and reliability decrease due to feature damage

Engineering Contradiction:
Improveproduct yield and reliabilityVSAvoidfeature damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by forming the resist protective oxide layer before the etching process. This protective layer is deposited in advance to prevent etchant from damaging the high-k dielectric material and other sensitive features during subsequent etching operations, thereby improving product yield and reliability without complicating the manufacturing process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The resist protective oxide layer serves as an intermediary protective barrier between the etchant and the sensitive semiconductor features. This intermediate layer absorbs the harmful effects of the etching process, protecting the underlying high-k dielectric and gate structures from damage while allowing the etching to proceed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the resist protective oxide layer is applied to protect during silicidation, then silicidation control is improved, but manufacturing complexity increases due to additional patterning steps

Engineering Contradiction:
Improvesilicidation controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The resist protective oxide layer performs multiple functions: it protects during both the silicidation process and the subsequent etching process. This multi-functional approach eliminates the need for separate protective layers for each process step, thereby improving silicidation control without significantly increasing manufacturing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the protective function for silicidation and etching into a single resist protective oxide layer. By combining these protection requirements into one layer, the process complexity is minimized while achieving precise control over silicidation in the desired areas

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10083860B2Semiconductor structure with resist protective oxide on isolation structure and method of manufacturing the same
Publication Date: 2018.09.25 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10083860B2 patent drawing
  • US10083860B2 patent drawing
  • US10083860B2 patent drawing

AI summary

A method of forming a semiconductor structure includes; (i) forming an isolation structure in a semiconductor substrate, the isolation structure electrically isolating device regions of the semiconductor substrate; (ii) forming a gate structure extending from one of the device regions to the isolation structure; (iii) forming a resist protective oxide layer overlaying the gate structure and the isolation structure; and (iv) patterning the resist protective oxide layer to form a patterned resist protective oxide that covers at least a portion of the isolation structure and a portion of the gate structure on the isolation structure.