Resist Layer Treating Material for Etching Selectivity

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Solution Overview

Problem

As semiconductor device sizes shrink, lithography processes become increasingly challenging due to difficulties in achieving high etching selectivity between resist layers and material layers, leading to issues in pattern transfer and device miniaturization.

Innovation Solution

A method is introduced where a treating material layer, comprising a silicon-containing compound, is formed over the exposed portion of a patterned resist layer to modify its top surface, enhancing etching selectivity during subsequent etching processes by reducing the etching rate of the resist layer and improving pattern transfer accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If device sizes are shrunk to increase integration level, then higher level of integration is achieved, but lithography processes become more challenging

Engineering Contradiction:
Improveintegration levelVSAvoidlithography process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The lithography process is segmented into multiple distinct steps: forming the resist layer, exposing to create pattern, applying treating material layer to modify surface, developing to form openings, and etching. This segmentation allows each step to be optimized independently, addressing the complexity challenge of miniaturization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A treating material layer is applied to the exposed resist layer before the etching process. This preliminary action modifies the surface properties of the resist layer, enhancing etching selectivity and enabling precise pattern transfer at smaller device dimensions.

Inventive Principle:
Principle #10Preliminary action

2Length of moving object

If conventional lithography processes are used for miniaturized devices, then device miniaturization is attempted, but etching selectivity between resist layer and material layer deteriorates

Engineering Contradiction:
Improvedevice sizeVSAvoidetching selectivity
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

A treating material layer is introduced as an intermediary between the resist layer and the material layer during etching. This intermediary layer modifies the surface of the resist layer to enhance etching selectivity, enabling precise pattern transfer even as device dimensions shrink.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The surface properties of the resist layer are modified by applying a treating material layer, changing parameters such as surface energy, roughness, or chemical composition. This parameter change enhances etching selectivity, allowing material layer to be etched selectively while preserving the resist layer pattern at smaller scales.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves etching selectivity and pattern transfer fidelity, allowing for more precise and efficient formation of semiconductor structures, even at smaller scales, thereby supporting the miniaturization of semiconductor devices.

Implementation Method 1

a top surface of the exposed portion of the resist layer reacts with the treating material layer

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Data Source

PatentUS10312108B2Method for forming semiconductor structure using modified resist layer
Publication Date: 2019.06.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10312108B2 patent drawing
  • US10312108B2 patent drawing
  • US10312108B2 patent drawing

AI summary

Methods for forming a semiconductor structure are provided. The method for forming a semiconductor structure includes forming a material layer over a substrate and forming a resist layer over the material layer. The method for forming a semiconductor structure further includes exposing the resist layer to form an exposed portion of the resist layer and forming a treating material layer over the exposed portion and an unexposed portion of the resist layer. In addition, a top surface of the exposed portion of the resist layer reacts with the treating material layer. The method for forming a semiconductor structure further includes removing the treating material layer and removing the unexposed portion of the resist layer to form an opening in the resist layer after the treating material is removed.