Resistance Change Memory Bit Line Integration
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Solution Overview
Problem
Current nonvolatile memory devices face challenges in achieving structural stability and operational reliability as integration increases, particularly in resistance change memory devices that rely on varying resistance states for data storage, which can be prone to instability and limited by the design of charge storage structures.
Innovation Solution
A nonvolatile memory device design featuring a substrate with gate electrode structures, gate dielectric layers, channel layers, and resistance change structures, where bit line structures are integrated within the resistance change layer to facilitate efficient resistance switching and data storage, allowing for both high and low resistance states to be stored nonvolatively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a three-layer stacked structure including charge tunneling layer, charge trap layer, and charge barrier layer is used for charge storage, then the memory device can store charge information, but the structural stability and operational reliability deteriorate as integration increases
Solution Approach 1:
The patent segments the memory device into distinct functional regions: gate electrode structures with gate dielectric layers for control, channel layers for current flow, and resistance change structures for data storage. This segmentation allows each component to be optimized independently, reducing overall structural complexity while maintaining reliability.
Solution Approach 2:
The patent transitions from planar charge storage structures to three-dimensional vertically stacked configurations. Multiple gate electrode structures are arranged in the first direction with corresponding channel layers and resistance change structures, enabling higher integration density without proportionally increasing structural complexity.
2Stability of the object's composition
If resistance change memory devices vary resistance states for data storage, then data can be stored nonvolatively, but structural stability deteriorates
Solution Approach 1:
The resistance change structures are formed using composite material systems that combine materials with complementary properties. These composite structures provide both the necessary resistance switching capability and the structural stability required for reliable operation, addressing the contradiction between operational reliability and structural stability.
3Productivity
If bit line structures are integrated within the resistance change structure, then integration density improves, but device complexity increases
Solution Approach 1:
The patent merges the bit line structures with the resistance change structures by forming bit lines within the resistance change structure. This integration eliminates the need for separate bit line structures, reducing device complexity while achieving high integration density. The resistance change structure serves dual functions as both the memory element and the bit line interconnect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the structural stability and operational reliability of nonvolatile memory devices by enabling effective resistance switching and data storage, improving the integration density and reliability of memory cells through the precise arrangement of gate electrode structures, channel layers, and bit line structures within the resistance change layer.
Implementation Method 1
a resistance change structure disposed between the pair of gate electrode structures on the substrate and disposed to contact the pair of channel layers
Data Source
AI summary
A nonvolatile memory device according to an embodiment includes a substrate, a gate electrode structure disposed on the substrate, a gate dielectric layer covering at least a portion of a sidewall surface of the gate electrode structure on the substrate, a channel layer and a resistance change structure that are sequentially disposed on the gate dielectric layer, and a plurality of bit line structures disposed inside the resistance change structure.