Resistance Change Memory Control Circuit Address-Based Potential Adjustment
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Solution Overview
Problem
In cross-point type resistance change memory arrays, leak currents through unselected memory cells lead to sneak currents, increasing operation voltage and consumption current, as the voltage or current applied to a selected memory cell is reduced due to these unwanted currents.
Innovation Solution
The implementation of a control circuit that adjusts the potentials applied to unselected conductive lines based on the address of the selected memory cell, using offset values determined by a Look-Up Table, to minimize leak currents and sneak currents, thereby optimizing the voltage application to the selected memory cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage or current is applied to selected memory cell in cross-point type array, then resistance change operation is enabled, but leak currents flow through unselected memory cells causing sneak currents
Solution Approach 1:
The patent applies different potential levels to different conductive lines based on their spatial position relative to the selected memory cell. Unselected conductive lines in different regions receive different potential adjustments (first potential for nearer lines, second potential for farther lines), creating localized potential gradients that suppress leak currents in specific regions without affecting the entire array.
Solution Approach 2:
The patent dynamically changes the potential parameters of unselected conductive lines based on the address of the selected memory cell. By adjusting potentials according to the spatial position and using offset values from a Look-Up Table, the system optimizes the potential distribution to minimize sneak currents while maintaining reliable operation of the selected cell.
2Power
If operation voltage is increased to overcome sneak currents, then sufficient current can be applied to selected memory cell, but consumption current increases
Solution Approach 1:
Instead of uniformly increasing the operation voltage across the entire array, the patent applies localized potential adjustments only to unselected conductive lines based on their position. This creates targeted potential gradients that suppress sneak currents locally, allowing the selected memory cell to receive sufficient current without requiring a uniform increase in operation voltage that would raise overall consumption current.
Solution Approach 2:
The patent uses dynamic potential adjustment with offset values determined by the selected memory cell's address to optimize the voltage distribution. By carefully controlling the potential parameters of unselected lines based on their position, the system achieves effective sneak current suppression with minimal increase in operation voltage, thereby reducing overall consumption current.
3Device complexity
If uniform potential is applied to all conductive lines, then circuit control is simple, but leak currents cannot be effectively suppressed
Solution Approach 1:
The patent introduces position-dependent potential adjustments for unselected conductive lines, dividing the array into regions based on spatial position. This creates localized potential gradients that effectively suppress leak currents in unselected cells while maintaining relatively simple control circuitry through the use of standardized potential levels (first and second potentials) applied according to address information.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces leak currents and sneak currents, leading to a lower consumption current and more efficient operation by ensuring that the selected memory cell receives the intended voltage or current, while avoiding erroneous writing in unselected memory cells.
Implementation Method 1
a resistance change element that changes a resistance value of the resistance change memory
Implementation Method 2
Each of the memory cells comprises a rectifying element and a resistance change element connected in series
Data Source
AI summary
According to one embodiment, a memory includes memory cells between first conductive lines and second conductive lines. A control circuit is configured to apply a first potential to a first end of a selected first conductive line connected to the selected memory cell among the first conductive lines and first ends of unselected second conductive lines not connected to the selected memory cell among the second conductive lines, apply a second potential larger than the first potential to a first end of a selected second conductive line connected to the selected memory cell among the second conductive lines, apply third potentials smaller than the second potential to first ends of unselected first conductive lines not connected to the selected memory cell among the first conductive lines respectively, and change values of the third potentials based on an address of the selected first conductive line.