Resistance Change Memory Cell Write Current Direction Control

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Solution Overview

Problem

In resistance change type memory, miniaturization of memory cells leads to increased wiring resistance and transistor turn-on resistance, reducing the write current, which shortens data-retention periods and increases the likelihood of read disturb due to reduced voltage ratios between write and read operations.

Innovation Solution

The implementation of a cross-point type cell array structure with diodes and zener diodes connected in specific configurations to manage write currents, ensuring that the voltage applied to zener diodes meets or exceeds zener voltage during writing, thereby preventing sneak currents and improving data retention and reading sensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cell is miniaturized to increase storage density, then storage capacity is improved, but wiring resistance and transistor turn-on resistance increase causing write current to decrease

Engineering Contradiction:
Improvestorage capacityVSAvoidwrite current
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent employs dynamic control of write current by switching between two complementary write currents (first write current and second write current) with opposite directions. This dynamic approach allows the system to overcome the limitations of miniaturized memory cells by adaptively adjusting current direction to ensure sufficient write current reaches the memory cell despite increased wiring and transistor resistance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of write current direction by using complementary write currents flowing in opposite directions. This parameter change enables the system to maintain effective write operations in miniaturized memory cells where resistance increases would otherwise prevent sufficient current delivery, thus resolving the contradiction between miniaturization and write current reliability.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If write current value is reduced due to miniaturization, then power consumption is reduced, but data-retention period is shortened

Engineering Contradiction:
Improvepower consumptionVSAvoiddata-retention period
Core Design Contradiction:
Use of energy by moving objectVSDuration of action of stationary object

Solution Approach 1:

The patent dynamically switches between first and second write currents depending on the required operation. This dynamic control allows the system to maintain data-retention period by ensuring sufficient write current is applied when needed, while managing power consumption through controlled current application rather than continuous current flow.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the direction parameter of write current using complementary currents. This enables the system to achieve sufficient write effect for maintaining data retention without requiring excessively high current magnitudes, thus balancing power consumption and data-retention period in miniaturized memory cells.

Inventive Principle:
Principle #35Parameter changes

3Duration of action of stationary object

If write current is increased to maintain data retention, then data-retention period is improved, but read disturb becomes more likely due to reduced voltage ratio between write and read operations

Engineering Contradiction:
Improvedata-retention periodVSAvoidread disturb
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The patent segments the write current into two complementary components (first write current and second write current) with opposite directions. This segmentation allows the system to achieve the necessary write effect for data retention while controlling the voltage applied during read operations, thereby preventing read disturb by ensuring the voltage ratio between write and read operations remains appropriate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses complementary write currents that flow in opposite directions. This inversion approach allows the system to apply sufficient current for data retention during write operations while maintaining voltage levels that prevent read disturb, as the complementary nature of the currents enables precise control over voltage application timing and magnitude.

Inventive Principle:
Principle #13The other way round (Inversion)

4Use of energy by moving object

If voltage applied to memory cell during write is reduced, then power consumption is reduced, but reading sensitivity deteriorates due to reduced voltage ratio with read operation

Engineering Contradiction:
Improvepower consumptionVSAvoidreading sensitivity
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent dynamically controls voltage application by using complementary write currents that can be switched as needed. This dynamic control allows the system to maintain reading sensitivity by ensuring appropriate voltage ratios between write and read operations, while managing power consumption through controlled current application rather than continuously high voltage levels.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8009456B2Resistance change type memory
Publication Date: 2011.08.30 KIOXIA CORP
  • US8009456B2 patent drawing
  • US8009456B2 patent drawing
  • US8009456B2 patent drawing

AI summary

A resistance change type memory includes first, second and third drive lines, a resistance change element having one end connected to the third drive line, a first diode having an anode connected to the first drive line and a cathode connected to other end of the first resistance change element, a second diode having an anode connected to other end of the first resistance change element and a cathode connected to the second drive line, and a driver/sinker which supplies a write current to the resistance change element. A write control circuit is arranged such that when first data is written, the write current is caused to flow in a direction from the first drive line to the third drive line, and when second data is written, the write current is caused to flow in a direction from the third drive line to the second drive line.