Resistance Changing Layer Oxygen Vacancy Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices with three-dimensional structures face challenges in achieving high integration and capacity due to limitations in design rules and integration degree, particularly in memory devices, where existing technologies struggle to efficiently utilize resistance changing layers for multilevel signal storage and voltage control.
Innovation Solution
A semiconductor device design that includes a substrate with a gate structure, a resistance changing layer, and a resistor layer, where oxygen vacancies in the resistance changing layer are manipulated to change resistance states through external electric fields, allowing for non-volatile storage of resistance changes without the need for a forming operation, enabling multilevel signal storage and improved voltage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing resistance changing layer technologies are used in three-dimensional semiconductor structures, then integration degree increases, but forming operations are required which limit design rules and reduce manufacturing efficiency
Solution Approach 1:
The patent applies preliminary action by pre-forming oxygen vacancies in the resistance changing layer during the manufacturing process itself, rather than requiring subsequent forming operations. The reduction reaction layer is deposited and treated to create oxygen vacancies in advance, so that when the device is operated, the resistance states can be immediately switched without additional forming steps, thus improving manufacturing efficiency and reducing device complexity
Solution Approach 2:
The patent extracts the forming operation requirement from the device operation sequence by incorporating the vacancy formation process into the manufacturing stage. The reduction reaction layer is used to extract oxygen from the oxidation reaction layer during manufacturing, creating oxygen vacancies beforehand, which removes the need for separate forming operations during device use and simplifies the overall device structure
2Quantity of substance
If resistance changing layers are used for multilevel signal storage, then storage capacity increases, but voltage control becomes more difficult
Solution Approach 1:
The patent applies local quality by creating regions with different oxygen vacancy concentrations within the resistance changing layer. The reduction reaction layer is selectively positioned and treated to generate oxygen vacancies in specific local regions, enabling different resistance states in different parts of the layer. This local differentiation allows for multilevel signal storage while maintaining simple voltage control through a single gate electrode that can modulate the resistance of each local region independently
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device effectively stores multiple resistance states and controls voltage levels by altering oxygen vacancy distribution, enhancing integration density and capacity without the need for additional forming operations, thus addressing the limitations of existing technologies.
Implementation Method 1
A reduction reaction layer may be formed on the oxidation reaction layer. A resistor layer, a resistance changing layer, and an insulating layer may be formed by reacting the oxidation reaction layer and the reduction reaction layer.
Data Source
AI summary
A semiconductor device includes a substrate and a gate structure disposed over the substrate. The gate structure includes at least one gate electrode layer and at least one interlayer insulating layer that are alternately stacked over the substrate. The semiconductor device includes a hole pattern penetrating the gate structure over the substrate, and a gate insulating layer, a channel layer, a resistor layer, and a resistance changing layer sequentially disposed on a sidewall surface of the gate structure within the hole pattern. Each of the resistor layer and the resistance changing layer is disposed opposite to the gate insulating layer, based on the channel layer.