Variable Resistance Layer Crystallization Rate Segmentation
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Solution Overview
Problem
Ionic memory devices face a trade-off between data retention characteristics and ease of resetting, where high voltage is required for resetting due to the stability of the filament in the variable resistance layer, which degrades rewriting durability.
Innovation Solution
A memory device with a variable resistance layer comprising a high crystallization rate lower portion and a low crystallization rate upper portion, allowing for stable data retention and efficient resetting by controlling the crystallization rate and structure of the silicon layers, enabling low set voltage operations and easy reset operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the variable resistance layer is configured to have good retention characteristics, then the filament formed inside the variable resistance layer in the set state is stable, but a high voltage must be applied to perform the reset operation, which degrades rewriting durability
Solution Approach 1:
The variable resistance layer is divided into a lower portion with high crystallization rate and an upper portion with low crystallization rate. This segmentation allows the lower portion to provide stable filament formation for good data retention, while the upper portion facilitates easier reset operations by requiring lower voltage to dissolve the filament.
Solution Approach 2:
Different regions of the variable resistance layer are given different crystallization rates to achieve different local properties. The lower portion has high crystallization rate for stability, while the upper portion has low crystallization rate for ease of resetting. This local quality differentiation resolves the contradiction between retention and reset ease.
2Ease of operation
If high voltage is applied to cause the filament to disappear for reset operation, then the reset can be performed, but the rewriting durability degrades
Solution Approach 1:
By segmenting the variable resistance layer into regions with different crystallization rates, the reset operation can be performed at lower voltage through the upper portion's low crystallization rate特性, avoiding the high voltage damage that would degrade rewriting durability.
Solution Approach 2:
The crystallization rate parameter is changed spatially across the variable resistance layer. The upper portion's low crystallization rate allows filament dissolution at lower voltages, protecting the overall device durability while still enabling effective reset operations.
3Use of energy by moving object
If the variable resistance layer is made thin for low voltage operations, then low voltage/low current operations are enabled, but the filament stability may be compromised
Solution Approach 1:
The lower portion of the variable resistance layer is designed with high crystallization rate to ensure filament stability, while the overall thin structure enables low voltage operations. This local quality differentiation maintains stability despite the reduced thickness.
Solution Approach 2:
The variable resistance layer functions as a composite structure with different crystallization rate regions, combining the stability-providing characteristics of high crystallization rate material in the lower portion with the low-voltage-enabling thin overall structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves excellent data retention characteristics with stable filaments for long durations and efficient resetting, balancing the trade-off between retention and reset ease without increasing the set voltage, while maintaining thin layers for low voltage operations and easy patterning.
Implementation Method 1
The lower portion has a relatively high crystallization rate. The upper portion contacts the ion source electrode. The upper portion has a relatively low crystallization rate.
Implementation Method 2
The first layer has a relatively high crystallization rate. The second layer has a relatively low crystallization rate. The first layer and the second layer are stacked along a direction connecting the first electrode and the second electrode.
Data Source
AI summary
According to one embodiment, a memory device includes a first electrode, a second electrode and a variable resistance layer. The second electrode includes a metal. The metal is more easily ionizable than a material of the first electrode. The variable resistance layer is disposed between the first electrode and the second electrode. The variable resistance layer includes a first layer and a second layer. The first layer has a relatively high crystallization rate. The second layer contacts the first layer. The second layer has a relatively low crystallization rate. The first layer and the second layer are stacked along a direction connecting the first electrode and the second electrode.