Resistance Memory Cell Parasitic Current Suppression

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Solution Overview

Problem

In resistance memory arrays, parasitic currents through unselected memory elements complicate the determination of the resistance state, making it difficult to accurately read data values, as these currents alter the current-voltage behavior and obscure the distinction between high-resistance and low-resistance states.

Innovation Solution

Incorporating a two-terminal access device in series with the resistance memory element, which allows bi-directional current flow and applies specific voltage pulses to set, reset, and read the resistance state without altering it, thereby suppressing parasitic currents and enabling accurate state determination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If access devices are used to suppress parasitic currents, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvedetermination of resistance stateVSAvoidcurrent-voltage behavior alteration
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a two-terminal access device as an intermediary element between the read circuit and the resistance memory element. This access device acts as a mediator that selectively controls current flow: it remains non-conductive for unselected memory elements (blocking parasitic currents) and becomes conductive only when both word line and bit line are activated (allowing legitimate read current). This resolves the contradiction by providing measurement precision through parasitic current suppression while managing device complexity through controlled activation rather than permanent structural modification.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The access device exhibits dynamic behavior where its electrical characteristics change based on activation conditions. When the word line and bit line are both activated, the access device transitions from a non-conductive state to a conductive state, allowing current flow. This dynamic switching capability enables the system to differentiate between selected and unselected memory elements, suppressing parasitic currents during read operations while maintaining the ability to access legitimate data when needed.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If read voltage is applied to determine resistance state, then measurement precision is improved, but reliability deteriorates due to state alteration

Engineering Contradiction:
Improveresistance state detectionVSAvoiddata integrity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by using the access device to preemptively block parasitic current paths before they can interfere with the read operation. The access device is configured to remain non-conductive during read operations for unselected memory elements, preventing parasitic currents from altering the resistance state or interfering with the measurement. This preliminary prevention ensures that when a read operation is performed on a selected memory element, the measurement is accurate and the state is not inadvertently changed by unwanted current paths.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The system utilizes parameter changes in the access device's electrical characteristics based on activation state. When activated, the access device transitions to a conductive state with low resistance, allowing the read current to flow through the selected memory element. When not activated, it maintains a high-resistance non-conductive state. This parameter change enables precise control over when measurements occur and ensures that read operations only affect intended memory elements, maintaining both measurement precision and data integrity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The two-terminal access device effectively reduces parasitic current flow, allowing reliable and rapid determination of the resistance state during read operations, ensuring accurate data retrieval without inadvertently changing the state of the memory cell.

Implementation Method 1

The two-terminal access device is configured to enable a bi-directional flow of current through the resistance memory element in response to application of a voltage greater than a threshold voltage

Methodology Applied
Scientific EffectThreshold voltage effect:

Implementation Method 2

A conductive-bridging resistance-change memory element has at least two distinct stable resistance states: a low-resistance state and a high-resistance state. The resistance memory element can be switched from a high-resistance state to a low-resistance state by the application of a voltage pulse of one polarity and can be switched from a low-resistance state to a high-resistance state by the application of a voltage pulse of the opposite polarity

Methodology Applied
Scientific EffectConductive-bridging resistance change:

Data Source

PatentUS10614883B2Resistance memory cell
Publication Date: 2020.04.07 HEFEI RELIANCE MEMORY LTD
  • US10614883B2 patent drawing
  • US10614883B2 patent drawing
  • US10614883B2 patent drawing

AI summary

A resistance memory includes a resistance memory cell having a resistance memory element and a two-terminal access device in series. The two-terminal access device affects the current-voltage characteristic of the resistance memory cell. The resistance memory additionally includes a circuit to apply across the resistance memory cell a set pulse having a set polarity to set the resistance memory cell to a low-resistance state that is retained after application of the set pulse, a reset pulse having a reset polarity, opposite to the set polarity, to reset the resistance memory cell to a high-resistance state that is retained after application of the reset pulse, and a read pulse of the reset polarity and smaller in magnitude than the reset pulse to determine the resistance state of the resistance memory cell without changing the resistance state of the resistance memory cell.