Variable Resistance Memory Recovery Voltage Pulse
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional variable resistance non-volatile memory devices experience unstable resistance changing phenomena as the number of rewriting operations increases, leading to a 'low-resistance frozen state' where the resistance state fails to switch to the high-resistance state despite applied voltage pulses.
Innovation Solution
A writing method for variable resistance non-volatile memory elements, involving a recovery voltage pulse set composed of two pulses with the same polarity as the initial voltage pulses but with greater amplitude, applied to recover the resistance state from the 'low-resistance frozen state' and ensure stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage pulses are applied alternately to change resistance state for data storage, then the memory element can store information, but the resistance changing operation becomes unstable after repeated rewriting
Solution Approach 1:
The patent introduces a recovery voltage pulse with greater amplitude than the normal writing voltage pulse. This parameter change (amplitude increase) enables the system to recover from unstable states that occur during repeated rewriting cycles, thereby maintaining stable resistance changing operations over extended durations without degrading performance
Solution Approach 2:
The recovery voltage pulse is applied in advance when instability is detected during rewriting operations. This preliminary corrective action prevents the accumulation of instability over multiple cycles, ensuring long-term reliability of the memory element by addressing issues before they compromise data storage capability
2Reliability
If high-resistance state writing voltage pulse and low-resistance state writing voltage pulse are applied alternately in repetition, then resistance changing operation is stable in initial stage, but resistance changing state becomes unstable after increased rewriting
Solution Approach 1:
The patent implements a detection mechanism that monitors the resistance state during rewriting operations and identifies when instability occurs. When instability is detected, the system automatically applies the recovery voltage pulse with greater amplitude. This feedback loop ensures that the resistance changing operation remains stable throughout extended rewriting durations by dynamically adjusting the voltage pulse parameters in response to operational conditions
3Ease of operation
If conventional voltage pulses are used for rewriting, then the memory element operates with simple control, but the low-resistance frozen state occurs where resistance state fails to switch
Solution Approach 1:
The patent introduces a dynamic control mechanism that adapts the voltage pulse parameters based on operational conditions. During normal rewriting, conventional voltage pulses are used for simplicity. However, when the low-resistance frozen state is detected (where resistance state fails to switch), the system dynamically switches to applying a recovery voltage pulse with greater amplitude. This dynamic adjustment maintains ease of operation under normal conditions while ensuring complete resistance state switching when needed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method stabilizes the resistance changing operation even with increased rewriting cycles, significantly improving the reliability of the non-volatile memory device by resolving the 'low-resistance frozen state' issue and maintaining proper operation windows.
Implementation Method 1
the variable resistance non-volatile memory element changes the resistance state from a first resistance state used to store first information to a second resistance state used to store second information by application of a pulse of a first voltage, and changes the resistance state from the second resistance state to the first resistance state by application of a pulse of a second voltage which is different in polarity from the first voltage
Data Source
AI summary
A writing method of a variable resistance non-volatile memory element comprises determining, in a first determination step, whether or not a resistance state of the variable resistance non-volatile memory element does not switch to a first resistance state and remains in a second resistance state, when a pulse of a second voltage is applied to the variable resistance non-volatile memory element; and when it is determined that the resistance state of the variable resistance non-volatile memory element does not switch to the first resistance state and remains in the second resistance state in the first determination step, applying, in a recovery step, at least once to the variable-resistance non-volatile memory element a recovery voltage pulse set composed of two pulses which are a first recovery voltage pulse which has the same polarity as that of the first voltage and a second recovery voltage pulse which has the same polarity as that of the second voltage, has a greater amplitude than the second voltage, and is applied subsequently to the first recovery voltage pulse.


