3D Resistance Memory Sense Amplifier Placement

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Solution Overview

Problem

Existing resistance change memory devices with three-dimensional cell arrays face challenges in achieving high-speed data read and write operations, particularly in miniaturized and stacked configurations, due to limitations in sense amplifier placement and reference cell schemes.

Innovation Solution

The solution involves a three-dimensional resistance change memory device with a semiconductor substrate, where cell arrays are stacked and sense amplifier arrays are formed underneath, utilizing an open bit line scheme, multiple sense amplifier systems, and reference cells with adjustable resistance values to enable efficient data access and storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If cell arrays are miniaturized and stacked three-dimensionally to increase storage density, then the cell size is reduced and storage capacity is improved, but the speed of data read and write operations deteriorates due to limitations in sense amplifier placement and reference cell access

Engineering Contradiction:

Improvestorage densityVSAvoiddata read and write speed

Core Design Contradiction:

Quantity of substanceVSSpeed

Solution Approach 1:

The cell array is divided into multiple blocks (first cell array block, second cell array block, third cell array block) arranged in the bit line direction. Each block can be independently accessed and operated, allowing parallel data read/write operations across different blocks, thereby maintaining high speed while achieving high storage density through three-dimensional stacking.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Reference cells are introduced as intermediary elements coupled to bit lines. These reference cells provide stable reference resistance values that enable differential comparison in sense amplifiers, allowing accurate and fast data detection even in miniaturized three-dimensional cell arrays where direct access to all cells would be slow.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Device complexity

If sense amplifiers are placed under stacked cell arrays to enable three-dimensional configuration, then device integration is improved, but access efficiency to all cell layers deteriorates without proper reference cell schemes

Engineering Contradiction:

Improvedevice integrationVSAvoidaccess efficiency

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The reference cells serve multiple functions: they provide reference resistance values for differential comparison, enable access to multiple cell layers through shared bit lines, and facilitate stable operation of sense amplifiers. This multi-functionality allows the sense amplifier array under the stacked cell arrays to efficiently access all layers without increasing device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent transitions from two-dimensional cell array configuration to three-dimensional stacking with cell arrays arranged vertically. Bit lines extend through multiple layers, and sense amplifiers are positioned in the third dimension (under the cell arrays), enabling high integration while maintaining access efficiency through the reference cell-mediated differential comparison scheme.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Measurement precision

If reference cells are configured with adjustable resistance values to improve data detection accuracy, then measurement precision is improved, but device complexity increases due to additional control mechanisms

Engineering Contradiction:

Improvedata detection accuracyVSAvoidcontrol mechanism complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

Reference cells are configured with adjustable resistance values that can be changed according to detection requirements. By varying the resistance parameter of reference cells, the sense amplifiers can be optimized for different data detection scenarios, improving measurement precision without requiring complex additional control mechanisms beyond standard resistance control circuits.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8243493B2Resistance change memory device

Publication Date: 2012.08.14 KIOXIA CORP

AI summary

A resistance change memory device includes: a semiconductor substrate; a cell array so formed on the substrate as to have resistance-change memory cells three-dimensionally stacked and arranged; and a sense amplifier array formed on the substrate under the cell array, wherein the cell array includes first and second cell array blocks arranged in a bit line direction, and first and second bit lines are selected from the first and second cell array blocks, respectively, to constitute a pair and coupled to differential input nodes in the sense amplifier array.