Resistance Variable Memory Structure with Protection Spacers
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Solution Overview
Problem
Current resistive random access memory (RRAM) technologies face challenges in manufacturing complexity and cost due to their complex configurations and materials, which hinder the development of high-performance non-volatile memory devices.
Innovation Solution
A semiconductor structure with a resistance variable memory structure is formed using a method that includes embedding conductive structures in dielectric layers, forming protection spacers, and depositing a resistance variable layer capable of switching between high and low resistance states, utilizing materials like silicon nitride for protection spacers and high-k dielectric materials for the resistance variable layer, and patterning electrodes to create a stable conductive path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex configurations and materials are used in RRAM, then device performance can be improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent segments the memory structure into distinct functional layers including a first electrode, a resistance variable layer, and a second electrode, with each layer having specific materials and functions. This segmentation allows for optimized performance in each layer while maintaining overall manufacturing feasibility through standardized process steps.
Solution Approach 2:
The patent employs shared process steps and common materials for both memory and logic regions, making the manufacturing process universal across different device types. The resistance variable layer and electrode structures serve multiple functions including storage and electrical connection, reducing the need for separate specialized processes.
2Reliability
If complex configurations and materials are used in RRAM, then device performance can be improved, but manufacturing cost increases
Solution Approach 1:
The patent employs shared process steps and common materials for both memory and logic regions, making the manufacturing process universal across different device types. The resistance variable layer and electrode structures serve multiple functions including storage and electrical connection, reducing the need for separate specialized processes.
Solution Approach 2:
The patent utilizes voltage-controlled resistance switching in the resistance variable layer, where application of specific voltage levels transitions the material between high and low resistance states. This parameter-based control enables simple, low-cost read and write operations without requiring complex manufacturing or control circuitry.
3Device complexity
If shared process steps are used for memory and logic regions, then manufacturing complexity is reduced, but device performance may be compromised
Solution Approach 1:
The patent segments the memory structure into distinct functional layers including a first electrode, a resistance variable layer, and a second electrode, with each layer having specific materials and functions. This segmentation allows for optimized performance in each layer while maintaining overall manufacturing feasibility through standardized process steps.
Solution Approach 2:
The patent applies local quality by using specific materials and structures in the memory region (such as the resistance variable layer with particular composition and the protective spacer configuration) that are optimized for memory performance, while using shared processes for common functions. This allows high-performance memory characteristics in critical areas while maintaining manufacturing simplicity through process sharing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing complexity and cost by using shared process steps for both memory and logic regions, enhancing electrical stability and reliability of the resistance variable memory structure while allowing for efficient data storage through voltage-controlled resistance switching.
Implementation Method 1
depositing a resistance variable layer capable of switching between high and low resistance states
Implementation Method 2
The protection spacers are configurable to protect at least one conductive path in the resistance variable layer
Data Source
AI summary
A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, protection spacers and a second electrode. The first electrode has a top surface and a first outer sidewall surface on the memory region. The resistance variable layer has a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection spacers are disposed over a portion of the top surface of the first electrode and surround the second portion of the resistance variable layer. The protection spacers are configurable to protect at least one conductive path in the resistance variable layer. The protection spacers have a second outer sidewall surface substantially aligned with the first outer sidewall surface of the first electrode.