Resistive Element Contact Structure for Scaled Semiconductor Reliability
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Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at smaller sizes due to increased complexity and difficulty in fabrication processes as feature sizes decrease, leading to issues with processing and manufacturing complexity.
Innovation Solution
A semiconductor device structure is formed using a resistive element that is electrically connected through a new contact path underneath conductive features, with independent patterning processes to define contact openings and form the resistive element, reducing resistance mismatch and improving reliability and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity and difficulty increase
Solution Approach 1:
The patent segments the fabrication process into distinct stages: forming contact openings through the dielectric layer, depositing the resistive material layer, and patterning the resistive element. This segmentation allows each step to be optimized independently, reducing overall process complexity despite continued scaling to smaller feature sizes
Solution Approach 2:
The patent transitions from planar device structures to three-dimensional stacked architectures by forming resistive elements that extend vertically through multiple dielectric layers and contacting different conductive layers at different heights. This dimensional change increases functional density without proportionally increasing lateral fabrication complexity
2Productivity
If feature sizes decrease to increase functional density, then more devices fit per chip area, but manufacturing reliability decreases
Solution Approach 1:
The patent changes the physical and chemical parameters of the resistive material layer, including material composition (e.g., oxide materials), thickness, and deposition conditions, to achieve reliable resistive elements at scaled dimensions. These parameter adjustments ensure consistent electrical properties and manufacturing yield despite reduced feature sizes
Solution Approach 2:
The patent employs composite material structures combining resistive materials with surrounding dielectric and conductive materials, creating integrated structures that maintain reliability at smaller scales. The composite nature allows optimization of each material's properties for its specific function while ensuring overall device performance
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a first dielectric layer over the substrate. The semiconductor device structure also includes a first conductive feature and a second conductive feature surrounded by the first dielectric layer and a second dielectric layer over the first dielectric layer. The semiconductor device structure further includes a resistive element having a first portion over the second dielectric layer and a second portion penetrating through the second dielectric layer to be electrically connected to the first conductive feature. In addition, the semiconductor device structure includes a conductive via penetrating through the second dielectric layer to be electrically connected to the second conductive feature. The second portion of the resistive element is wider than the conductive via.