Resistive DAC Cell Layout for Output Linearity in MOS Drivers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Modern transmitters face challenges in achieving optimal linearity due to the non-linear output impedance of driver circuits in Digital-to-Analog Converters (DACs), particularly in Metal-Oxide-Semiconductor (MOS) technology, which affects the conversion of digital data to analog signals.

Innovation Solution

Incorporating a resistive element with a resistance of at least 20Ω, such as a thin film or polysilicon resistor, between the driver circuit and the capacitive element in DAC cells to desensitize the DAC to resistance variations, thereby linearizing the output stage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If driver circuits (inverter circuits or logic circuits) are used to drive output signals of DAC cells, then the DAC can convert digital data to analog signals, but the non-linear output impedance of the driver circuit degrades the linearity of the DAC

Engineering Contradiction:
ImproveDAC functionalityVSAvoidlinearity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A resistive element is introduced as an intermediary component between the driver circuit and the capacitive element in the DAC cell. This resistor linearizes the output impedance by dominating the impedance characteristics, thereby compensating for the non-linearity of the driver circuit and improving overall DAC linearity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The output impedance characteristics of the DAC cell are modified by adding a resistive element that changes the overall impedance profile. This parameter change linearizes the output stage, making the impedance more predictable and less dependent on the non-linear driver circuit behavior

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If MOS technology is used to implement driver circuits, then the DAC can be manufactured with standard semiconductor processes, but the unequal on-resistance of NMOS and PMOS components creates non-linear output impedance

Engineering Contradiction:
Improvesemiconductor fabricationVSAvoidoutput impedance linearity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The resistive element serves as a mediator that decouples the linearity requirements from the driver circuit implementation. By placing the resistor between the driver and capacitive element, it masks the non-linear impedance variations caused by unequal NMOS/PMOS on-resistances, allowing standard MOS fabrication to be used while achieving better linearity

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the linearity of the DAC, allowing for improved conversion of digital data to analog signals, leading to better performance in transmitters, especially in communication standards that demand higher accuracy.

Implementation Method 1

Incorporating a resistive element with a resistance of at least 20Ω, such as a thin film or polysilicon resistor, between the driver circuit and the capacitive element in DAC cells to desensitize the DAC to resistance variations, thereby linearizing the output stage

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS10855300B2Digital-to-analog converter
Publication Date: 2020.12.01 MAXLINEAR INC
  • US10855300B2 patent drawing
  • US10855300B2 patent drawing
  • US10855300B2 patent drawing

AI summary

A digital-to-analog converter is provided. The digital-to-analog converter includes a plurality of digital-to-analog converter cells coupled to an output node of the digital-to-analog converter. At least one of the plurality of digital-to-analog converter cells includes a capacitive element configured to generate an analog cell output signal based on a drive signal. The at least one of the plurality of digital-to-analog converter cells further includes a driver circuit configured to generate the drive signal, and a resistive element exhibiting a resistance of at least 20Ω. The resistive element is coupled between the driver circuit and the capacitive element or between the capacitive element and the output node.