Resistive Field Plate Termination for Higher-Voltage Power Semiconductors
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Solution Overview
Problem
Conventional high-voltage power semiconductor devices lack an effective internal withstand voltage termination structure based on resistive field plates, limiting their voltage withstand performance.
Innovation Solution
A power semiconductor device with resistive field plate structures integrated within the epitaxial layer, forming a termination region that surrounds the cell region, creating a radially arranged second resistive field plate structure to optimize the three-dimensional electric field distribution and enhance voltage withstand performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional surface or edge termination structures are used, then the device structure is simple, but the withstand voltage performance cannot be effectively improved
Solution Approach 1:
The patent transitions from conventional surface or edge termination structures to internal resistive field plate structures embedded within the semiconductor body. This dimensional change from surface-level to subsurface implementation enables the termination structure to actively participate in voltage blocking while maintaining structural integration, thereby improving withstand voltage performance without proportionally increasing device complexity
Solution Approach 2:
The resistive field plate structures are nested within the semiconductor body, specifically formed as implantation regions inside the drift region. This nesting approach allows the termination function to be embedded within the existing device architecture rather than added as a separate surface structure, achieving enhanced voltage performance while minimizing additional structural complexity
2Reliability
If internal resistive field plate structures are implemented, then the electric field distribution is optimized, but the manufacturing process becomes more complex
Solution Approach 1:
The patent combines the formation of resistive field plate structures with existing semiconductor manufacturing processes, specifically integrating the implantation steps into the standard device fabrication sequence. By merging the termination structure formation with the drift region processing, the patent achieves uniform electric field distribution without requiring entirely separate manufacturing workflows, thereby limiting the increase in process complexity
Solution Approach 2:
The patent utilizes controlled implantation parameters (energy, dose, depth) to create the resistive field plate structures with specific electrical characteristics. By adjusting these parameters, the electric field distribution can be optimized for uniformity while maintaining compatibility with standard manufacturing processes, balancing performance improvement with ease of manufacture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The internal resistive field plate termination structure improves the voltage withstand performance by forming a uniform electric field distribution, making the device compatible with both cell and termination region processes, with low manufacturing costs and complexity, and suitable for modern semiconductor device miniaturization.
Implementation Method 1
the plurality of second resistive field plate structures extending through an epitaxial layer in a first direction into a substrate are arranged in a termination region of the epitaxial layer... form a more uniform three-dimensional electric field distribution diverging around the cell region
Implementation Method 2
a first electrode, arranged on the cell region of the epitaxial layer and ohmically contacting each first resistive field plate structure
Data Source
AI summary
The disclosure provides a power semiconductor device and manufacturing method thereof. A plurality of second resistive field plate structures extending through an epitaxial layer in a first direction into a substrate are arranged in a termination region of the epitaxial layer and the plurality of second resistive field plate structures are arranged radially in a first plane. A plurality of tightly coupled second resistive field plates extending from a side close to a cell region to a side far away from the cell region form a more uniform three-dimensional electric field distribution diverging around the cell region, which optimizes a guiding and binding effect on a charge in a space depletion region of the cell region and improves a withstand voltage performance of the whole power semiconductor device.