Resistive Memory Bit Line Voltage Control
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Solution Overview
Problem
Conventional memory devices with resistive elements and selective switches face issues with voltage cross-talk during programming, leading to potential programming failures due to the high voltage levels used for selected and non-selected bit lines.
Innovation Solution
The implementation of a memory device with a common plate line and bit lines connected to a sense amplifier, where the bit lines are set to distinct voltage levels, allowing the sense amplifier to differentiate and amplify the voltage difference based on the resistive element's resistance state, thereby improving data reading and retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage is applied to selected bit lines for programming PMC cells, then programming capability is achieved, but voltage cross-talk occurs between selected and non-selected bit lines causing programming failures
Solution Approach 1:
The bit line voltage control is segmented into different levels: selected bit lines receive high voltage for programming, while non-selected bit lines are maintained at a first voltage level (e.g., ground or intermediate level) to prevent cross-talk. This segmentation isolates the high voltage effect to only the intended target cells.
Solution Approach 2:
The patent changes the voltage parameter of non-selected bit lines from high voltage to a first voltage level during programming operations. This parameter change eliminates the cross-talk issue while preserving the programming capability on selected bit lines. The sense amplifier also utilizes differential voltage levels (first and second voltage levels) for accurate data reading.
2Ease of operation
If conventional programming circuits are used with high voltage on bit lines, then programming function is achieved, but voltage cross-talk between floating bit lines causes programming failures
Solution Approach 1:
Before programming operations, non-selected bit lines are pre-configured to the first voltage level through control circuits. This preliminary action ensures that when high voltage is applied to selected bit lines, the non-selected bit lines are already in a safe state that prevents cross-talk, thereby ensuring programming success.
Solution Approach 2:
Control circuits act as intermediaries between the voltage sources and the bit lines. These control circuits selectively apply voltage levels to different bit lines based on selection signals, mediating the voltage distribution to prevent cross-talk while enabling programming functionality.
3Adaptability or versatility
If bit lines are used for both programming and reading operations, then circuit versatility is achieved, but voltage level conflicts occur during simultaneous operations
Solution Approach 1:
The voltage levels on bit lines are dynamically adjusted based on the operation type. During programming, selected bit lines receive high voltage while non-selected bit lines are at the first voltage level. During reading, the sense amplifier applies differential voltage levels (first and second voltage levels) to bit line pairs. This dynamic voltage control enables reliable multi-functionality.
Solution Approach 2:
The memory device alternates between different voltage configuration patterns for programming and reading operations. Control circuits periodically switch the voltage levels on bit lines according to the operation phase, ensuring that voltage conflicts are avoided while maintaining versatility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances memory retention and allows for improved reading and writing operations by minimizing voltage cross-talk, enabling the use of conventional DRAM circuits for data input and output, thus modifying the conventional DRAM memory device's input and output capabilities.
Implementation Method 1
the resistive element is able to change the resistance depending on an electrical voltage that is applied across the resistive element
Implementation Method 2
a current through the resistance of the PMC memory cell is detected and associated to a respective low resistance state or a high resistance state
Data Source
AI summary
A memory with memory cells, wherein a memory cell includes a resistive element and a switch, wherein the memory cells are connected with a common plate line and with respective bit lines, wherein the common plate line supplies a plate voltage, wherein the switches include control inputs that are connected with word lines for controlling the switching states, wherein the word lines are connected with a word line driver that supplies selected word lines with a voltage, wherein the bit lines are connected with second switches, wherein the first bit lines are connectable by respective second switches with a first voltage level and the second bit lines are connectable by respective second switches with a second voltage level, wherein a first and a second bit line are connectable as a bit line pair with a sense amplifier, wherein the sense amplifier amplifies a voltage difference between the first and the second bit line of the bit line pair, wherein the resistive element is able to change the resistance depending on an electrical voltage that is applied across the resistive element, and wherein the second voltage level is between the plate voltage level and the first voltage level.