Resistive Memory Cell Programming via Capacitor Discharge Control
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Solution Overview
Problem
Existing resistive memory cell programming technologies face challenges in accurately controlling the transition from a high resistance state to a low resistance state due to stray capacitance, which affects the ability to program multiple resistance levels and increases energy requirements.
Innovation Solution
The method involves charging a capacitor to a known voltage and controlling its discharge through a resistive switching element to program memory cells, using a current mirror to manage the programming current and bit line bias voltage to achieve precise resistance levels, thereby reducing stray capacitance effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional resistive memory cell programming is used, then memory cells can be programmed to desired states, but stray capacitance affects the ability to accurately control the transition between resistance states and increases energy requirements
Solution Approach 1:
The patent applies preliminary action by pre-charging a capacitor to a specific voltage level before the programming operation. This pre-prepared charged capacitor then serves as the programming source, allowing precise control of the programming pulse characteristics without requiring additional energy during the actual programming operation. The capacitor is charged in advance to the exact voltage needed for the desired resistance state transition.
Solution Approach 2:
The patent utilizes parameter changes by varying the bit line bias voltage to control the discharge characteristics of the pre-charged capacitor. By adjusting the bit line bias voltage parameter, the system can precisely control the amount of charge transferred to the memory cell, thereby accurately controlling the resistance state transition while minimizing energy consumption. This parameter control mechanism directly addresses the stray capacitance issue.
2Adaptability or versatility
If conventional programming methods are used, then memory cells can be programmed, but the ability to accurately program multiple resistance levels (MLC) is compromised due to stray capacitance effects
Solution Approach 1:
The patent enables MLC operation by dynamically changing the bit line bias voltage parameter during the programming process. Different bias voltage levels correspond to different target resistance states, allowing precise programming of multiple resistance levels. The pre-charged capacitor provides a controlled charge source that, when combined with variable bit line bias, achieves accurate multi-level resistance programming despite stray capacitance.
Solution Approach 2:
The patent incorporates sensing operations that read back the resistance state of programmed memory cells. This feedback mechanism allows verification of the programmed resistance level and enables adjustment of subsequent programming operations to achieve the desired multi-level states. The sensing step provides information about the actual resistance state, which can be used to refine the programming process for accurate MLC operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides greater control over the programming current, enabling accurate multi-level cell (MLC) operation with lower energy consumption and improved resistance state management.
Implementation Method 1
charging a capacitor coupled to the memory cell to a particular voltage level and programming the memory cell from a first state to a second state by controlling discharge of the capacitor through a resistive switching element
Data Source
AI summary
Methods, devices, and systems associated with memory cell operation are described. One or more methods of operating a memory cell include charging a capacitor coupled to the memory cell to a particular voltage level and programming the memory cell from a first state to a second state by controlling discharge of the capacitor through a resistive switching element of the memory cell.