Resistive Memory Cell Read Method Using Dual Voltage Phases
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Solution Overview
Problem
Existing memory devices face challenges in stabilizing data read operations, particularly in resistive memory cells, due to high power consumption and resistance state variations, which affect the accuracy and efficiency of data retrieval.
Innovation Solution
The implementation of a method involving a first read voltage to turn on or off resistive memory devices based on their resistance states, followed by a second read voltage with a lower voltage level to maintain the memory cell's state and reduce power consumption, utilizing an Ovonic Threshold Switch (OTS) selection device with snapback characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high read voltage is applied to turn on the memory cell for data reading, then the data can be sensed, but power consumption increases and resistance state variations occur
Solution Approach 1:
The read operation is segmented into two distinct voltage phases: a first read voltage (Vread1) applied initially to turn on the memory cell and enable data sensing, followed by a second read voltage (Vread2) with lower magnitude applied to maintain the cell in on-state during continued sensing. This segmentation allows the system to achieve both accurate data sensing and reduced power consumption by limiting the duration of high-voltage application.
2Ease of operation
If a high read voltage is applied to turn on the memory cell, then data reading is enabled, but resistance value changes occur during read operations
Solution Approach 1:
The first read voltage (Vread1) is applied as a preliminary action to turn on the memory cell before the main data sensing operation commences. This preliminary voltage application ensures the cell is in a conductive state, allowing subsequent data reading to proceed with a lower second read voltage (Vread2) that maintains stability and prevents unwanted resistance changes during the extended sensing period.
3Use of energy by moving object
If the read voltage is reduced to lower power consumption, then power efficiency improves, but the memory cell may turn off and data sensing fails
Solution Approach 1:
The read operation employs periodic voltage application with two distinct phases: an initial phase using a higher first read voltage (Vread1) to reliably turn on the memory cell and establish conduction, followed by a sustained phase using a lower second read voltage (Vread2) to maintain the on-state with reduced power consumption. This periodic voltage strategy ensures both reliable data sensing and power efficiency by optimally timing the high-voltage application.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes data read operations, reduces power consumption, and prevents resistance value changes during read operations, enhancing the reliability and efficiency of data retrieval in resistive memory devices.
Implementation Method 1
The selection device may have snapback characteristics.
Implementation Method 2
a resistive memory device which has a high resistance state or a low resistance state according to a data stored therein
Data Source
AI summary
A method for reading a data of a memory cell comprising a selection device and a resistive memory device which has a high resistance state or a low resistance state according to a data stored therein includes: applying a first read voltage to the memory cell; applying a second read voltage to the memory cell, the second read voltage having a level lower than a level of the first read voltage; and sensing the data of the memory cell while the second read voltage is applied to the memory cell.