Resistive Memory Cell Read Voltage Adjustment for Sensing Margins
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Solution Overview
Problem
Current nonvolatile memory devices face challenges in accurately sensing data from resistive memory cells, particularly in maintaining read sensing margins as resistance values increase, which affects the ability to reliably read multi-bit data without altering the stored values.
Innovation Solution
A nonvolatile memory device and method that dynamically adjust the read voltage and reference current based on the resistance value range of the resistive memory cell, using a sensing control circuit to determine the appropriate levels for each read operation, ensuring accurate data sensing without changing the stored values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a fixed read voltage is used for sensing data in resistive memory cells, then the sensing operation is simple, but the read sensing margin deteriorates as resistance values increase
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed read voltage to a dynamically adjustable read voltage that adapts to the resistance value range of the memory cell. The sensing control circuit determines the resistance value range and adjusts the read voltage level accordingly, making the system flexible and adaptive to different resistance conditions, thereby resolving the contradiction between operational simplicity and sensing reliability.
Solution Approach 2:
The patent changes the voltage parameter dynamically based on the resistance value range. Instead of using a constant read voltage, the system adjusts the read voltage level according to the determined resistance range, which improves the read sensing margin for high resistance memory cells while maintaining accurate data sensing.
2Reliability
If the read voltage level is increased to improve sensing margin for high resistance cells, then the read sensing margin improves, but the stored data values may be altered
Solution Approach 1:
The patent applies preliminary action by first determining the resistance value range of the memory cell before applying the read voltage. This preliminary determination allows the system to select an appropriate read voltage level that is sufficient to achieve good sensing margin but not so high as to alter the stored data values, thus preventing data integrity issues before they occur.
Solution Approach 2:
The patent carefully adjusts the voltage parameter within specific ranges determined by the resistance value classification. By changing the read voltage to appropriate levels (Vread1, Vread2, or Vread3) based on resistance ranges, the system improves sensing margin while maintaining data integrity through controlled parameter adjustment.
3Measurement precision
If multiple read operations with different voltage levels are performed, then accurate multi-bit data sensing is achieved, but the sensing process complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the resistance value range into distinct ranges (first, second, and third ranges) and associating each range with specific read voltage levels and sensing procedures. This segmentation allows the system to handle different resistance conditions with appropriate voltage levels, achieving accurate multi-bit data sensing while managing complexity through structured classification.
Solution Approach 2:
The patent uses parameter changes by selecting different read voltage levels (Vread1, Vread2, Vread3) and reference current levels based on the determined resistance value range. This approach enables accurate sensing of multi-bit data corresponding to different resistance ranges while maintaining a systematic and controllable sensing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances read sensing margins for resistive memory cells, particularly those with high resistance values, allowing for accurate multi-bit data reading without altering the stored data, thereby improving data integrity and storage capacity.
Implementation Method 1
a memory cell array including a resistive memory cell capable of being programmed in accordance with a variable resistance value
Implementation Method 2
configured to determine during a first read operation a resistance value range of the resistive memory cell
Implementation Method 3
a sense amplifier configured to discriminate data stored in the resistive memory cell using a read voltage and a reference current
Data Source
AI summary
A method of sensing multi-bit data stored in a resistive memory cell includes; determining a resistive value range for the memory cell by performing a first read operation using a first read voltage and a first reference current, determining whether the multi-bit data stored in the resistive memory cell has a first program state, upon determining that the multi-bit data stored does not have the first program state, selecting a second read voltage different from the first read voltage in response to the resistive value range of the resistive memory cell, and using the second read voltage to again determine whether the multi-bit data stored in the resistive memory cell has the first program state.