Resistive Memory Circuit for Liquid State Machine Temporal Classification

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Solution Overview

Problem

Conventional neuromorphic computing networks require significant physical space and power, limiting their application in industries like biomedical, military, and mobile devices due to their large scale and high energy consumption.

Innovation Solution

An analog neuromorphic circuit utilizing resistive memories in a crossbar configuration, which encodes input voltages and counts spikes to identify temporal signals, allowing for simultaneous execution of multiple operations with reduced power consumption and space requirements, enabling compact and efficient neuromorphic computing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional neuromorphic computing networks are implemented in large scale computer clusters, then computational efficiency is improved, but physical space and power consumption increase significantly

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidphysical space
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent replaces conventional digital computing mechanisms with analog computing mechanisms using resistive memories. The crossbar array of resistive memories performs parallel matrix multiplication operations in the analog domain, substituting the mechanical/digital sequential processing of conventional systems. This allows computational operations to be performed simultaneously across multiple neurons, achieving high computational efficiency while occupying minimal physical space on a single chip.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental operating parameters from digital binary states to continuous analog voltage levels. Resistive memories store weights as continuous resistance values, and neurons process information through continuous voltage potentials rather than discrete binary states. This parameter change enables parallel analog computation that achieves high productivity without requiring large physical infrastructure.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If conventional neuromorphic computing networks are implemented in large scale computer clusters, then computational efficiency is improved, but power consumption increases significantly

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent substitutes energy-intensive digital signal processing with energy-efficient analog computation. The resistive memory crossbar performs multiply-accumulate operations passively using Ohm's law and Kirchhoff's current law, eliminating the need for active digital processing elements. This substitution dramatically reduces power consumption while maintaining high computational throughput for neuromorphic applications.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The analog neuromorphic circuit performs computational operations autonomously through the natural physical laws governing resistive memories and neural networks. The system self-organizes parallel computation across the resistive memory crossbar without requiring external control for each operation, achieving high productivity with minimal energy input.

Inventive Principle:
Principle #25Self-service

3Productivity

If conventional neuromorphic computing networks are implemented, then multiple operations can be executed simultaneously, but device complexity increases

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the neuromorphic system into distinct functional layers: an input layer for receiving signals, a liquid layer for temporal signal processing and spike counting, and an output layer for classification. Each layer is implemented using the same resistive memory crossbar architecture, allowing parallel processing capability while managing complexity through modular functional segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The resistive memory crossbar architecture serves multiple functions: it stores synaptic weights, performs parallel matrix multiplication, and enables temporal signal processing. The same hardware structure handles both spatial and temporal dimensions of neuromorphic computation, reducing overall system complexity while maintaining high parallel processing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly enhances computational efficiency while minimizing power and space requirements, enabling neuromorphic computing in previously inaccessible applications by executing multiple operations in parallel with low power usage.

Implementation Method 1

analog neuromorphic circuit that implements a plurality of resistive memories... configured to encode a plurality of input voltages applied to the input layer via an input layer resistive memory crossbar configuration

Methodology Applied
Scientific EffectOhm's Law: Ohm's Law

Implementation Method 2

resistive memory crossbar configuration... liquid layer resistive memory crossbar configuration... output resistive memory crossbar configuration

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS20240037380A1Resistive memory circuit for liquid state machine with temporal classifcation
Publication Date: 2024.02.01 UNIV OF DAYTON
  • US20240037380A1 patent drawing
  • US20240037380A1 patent drawing
  • US20240037380A1 patent drawing

AI summary

An analog neuromphric circuit is disclosed having an input layer, a liquid layer, and an output layer each with resistive memory crossbar configurations to identify a temporal signal for a duration of time. The input layer encodes input layer spiking neurons based on encoding signals generated from input voltages applied an input layer resistive memory crossbar configuration. The liquid layer counts each spike generated by liquid layer spiking neurons for the duration of time based on liquid layer signals generated from the input spiking neuron voltages generated from each input layer spiking neurons applied to a liquid layer resistive memory crossbar configuration. The output layer identifies the temporal signal for the duration of time based on output voltages generated from the counting voltages generated from each count of each spike generated by the liquid layer spiking neurons for the duration of time applied to an output resistive memory crossbar configuration.