Resistive Memory Cell Resistance Measurement Circuit
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Solution Overview
Problem
Accurately measuring the resistance value of memory cells in an e-fuse array is challenging due to their arrangement in an array format and the presence of numerous peripheral circuits, which complicates precise resistance value determination.
Innovation Solution
A memory device with a row control circuit and column control circuit that applies external voltages in specific test modes to form current paths through selected memory units and switch units, allowing for the measurement of resistance values by comparing currents in different test modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged in an array format with peripheral circuits, then the storage capacity and functionality are improved, but the measurement precision of resistance values deteriorates
Solution Approach 1:
The measurement process is segmented into multiple test modes (first test mode, second test mode, third test mode) where different current paths are selectively activated. This allows the total resistance measurement to be broken down into component measurements (memory unit resistance + switch unit resistance + column line resistance), enabling precise determination of individual memory cell resistance values despite the complex array structure
Solution Approach 2:
Switch units are introduced as intermediary components that can be selectively activated to control current flow paths. By controlling the switch units, the measurement system can isolate specific memory cells for measurement while excluding other array elements, thereby achieving precise resistance measurement in the context of a large-scale array structure
2Measurement precision
If multiple current paths are formed through switch units and column lines, then the ability to measure individual memory unit resistance is improved, but the device complexity increases
Solution Approach 1:
The row control circuit and column control circuit are designed with multi-functionality, serving both normal memory operation and resistance measurement functions. The same switch units and column lines used for memory cell access are also utilized for resistance measurement, eliminating the need for separate dedicated measurement hardware and thus limiting the increase in device complexity
Solution Approach 2:
The measurement system dynamically reconfigures current paths by selectively activating different combinations of row lines, column lines, and switch units based on the measurement requirements. This dynamic control allows flexible measurement of any memory cell in the array without requiring permanent dedicated measurement paths, thereby managing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate measurement of resistance values of memory units by distinguishing between the resistance contributions of memory units, switch units, and column lines, thereby improving the reliability of the memory device.
Implementation Method 1
a row control circuit configured to turn on the switch units by selecting at least one of the row lines and apply an external voltage to a program/read line corresponding to the selected row line
Implementation Method 2
a column control circuit configured to select at least one of the column lines and couple the selected column line with a ground voltage terminal
Implementation Method 3
allowing for the measurement of resistance values by comparing currents in different test modes
Data Source
AI summary
A memory device includes a plurality of resistive memory units configured to receive a voltage of a corresponding line of a plurality of program/read lines, a plurality of switch units configured to each electrically connect a corresponding one of the resistive memory units with a corresponding line of a plurality of column lines in response to a voltage of a corresponding line of a plurality of row lines, where the program/read lines correspond to the row lines, respectively, a row control circuit configured to turn on the switch units by selecting at least one of the row lines and apply an external voltage to a program/read line corresponding to the selected row line in a first test mode, and a column control circuit configured to select at least one of the column lines and couple the selected column line with a ground voltage terminal in the first test mode.