Resistive Memory Programming with Bi-Directional Current Path Balancing
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Solution Overview
Problem
The use of a peri-under-cell (PUC) structure and bi-directional driving currents in resistive memory devices results in varying lengths of current paths for set and reset operations, affecting read margin, read time, and write time based on the position of the selected memory cell.
Innovation Solution
The resistive memory device employs a first and second signal line with a memory layer at their intersection, driven by first and second drivers providing different power voltages through contact structures, and includes a peripheral circuit layer with drivers for each signal line to manage current paths uniformly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a peri-under-cell (PUC) structure with bi-directional driving currents is used, then memory operation capability is improved, but current path length varies for set and reset operations affecting read margin and write time
Solution Approach 1:
The signal line is divided into multiple segments with different drive strengths. The first signal line segment has a first drive strength for set operations, while the second signal line segment has a second drive strength for reset operations. This segmentation allows each segment to be optimized for its specific function, ensuring consistent current path lengths and reliable operation across all memory cells regardless of position.
Solution Approach 2:
Different portions of the signal line are assigned different drive strengths based on their specific functions. The first signal line segment serving set operations has different drive characteristics compared to the second signal line segment for reset operations. This local differentiation ensures that each segment provides appropriate current characteristics, eliminating variations in read margin and write time based on memory cell position.
2Adaptability or versatility
If bi-directional driving currents are used, then memory characteristics are improved, but different length driving current paths result in position-dependent operation parameters
Solution Approach 1:
The signal line is segmented into multiple portions, each with a specific drive strength assigned according to its function in set or reset operations. This segmentation ensures that current paths for both set and reset operations have consistent lengths and characteristics, eliminating position-dependent write time variations while maintaining the benefits of bi-directional driving currents.
Solution Approach 2:
The drive strength parameter of the signal line is changed along its length, with the first signal line segment having a first drive strength and the second signal line segment having a second drive strength. This parameter variation ensures optimal current characteristics for both bi-directional operations, resulting in consistent write times across all memory cell positions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration stabilizes current paths for set and reset operations, ensuring consistent read margin, read time, and write time across memory cells, enhancing the device's operational reliability and efficiency.
Implementation Method 1
The memory layer may be configured to change its resistance based on a voltage difference between the first signal line and the second signal line
Data Source
AI summary
A resistive memory device may include a first and second signal lines, a memory layer, a first and second drivers, and a first contact structure. The first signal line may include a first contact node. The first and second signal lines may intersect. The second signal line may include a second contact node. The memory layer may be at an intersecting portion between the first and second signal lines and the memory layer may be configured to change its resistance based on a voltage difference between the first and second signal lines. The first and second drivers may be configured to selectively provide the first contact node with a first power voltage and a second power voltage different from the first power voltage, respectively. The first contact structure may be configured to electrically connect the first contact node with the first and second drivers.