Resistive Memory Degradation Compensation via Dynamic Write Current
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Solution Overview
Problem
Resistive memory devices face degradation issues due to decreased sensing margins between set and reset data states, leading to unreliable data sensing and increased bit errors, which affects data retention and endurance, especially under high temperature conditions and repeated program cycles.
Innovation Solution
A method involving a memory controller that monitors bit error rates and adjusts the write current to a level greater than the minimum necessary for programming memory cells, thereby compensating for degradation by enhancing the resistance states and improving data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the minimum write current is used to program memory cells, then energy consumption is reduced, but the sensing margin decreases and data reliability deteriorates due to degradation
Solution Approach 1:
The patent implements dynamic write current adjustment based on the number of program operations. The memory controller monitors the program count and adaptively increases the write current from an initial level to a compensated level when degradation is detected, and dynamically adjusts the read voltage threshold. This dynamic adaptation resolves the contradiction by using higher current only when necessary for degraded cells, maintaining data reliability while minimizing energy consumption during normal operation.
Solution Approach 2:
The patent changes the write current parameter based on the program operation count and degradation state. When the number of program operations exceeds a threshold indicating degradation, the system increases the write current parameter from its minimum value to a compensated value that restores the sensing margin. This parameter change directly addresses the contradiction by adjusting current levels to maintain reliability while avoiding unnecessary energy consumption.
2Reliability
If the write current is increased to compensate for degradation, then the sensing margin is restored and data reliability improves, but energy consumption increases
Solution Approach 1:
The system dynamically adjusts the write current based on real-time monitoring of program operation counts and degradation indicators. The memory controller increases the write current only when the sensing margin falls below a threshold, and restores it to minimum levels when degradation is compensated. This dynamic adjustment resolves the contradiction by applying higher current selectively only when needed for reliability, rather than continuously.
Solution Approach 2:
The patent implements a feedback mechanism where the memory controller monitors program operation counts, reads memory cell states, and detects degradation through changes in read thresholds or error rates. Based on this feedback, the controller adaptively adjusts the write current level. This feedback loop ensures that increased current is applied only when degradation is detected, maintaining sensing margin while minimizing unnecessary energy consumption.
3Reliability
If more frequent read operations are performed to monitor degradation, then data reliability is maintained, but timing overhead increases
Solution Approach 1:
The patent implements periodic degradation monitoring at strategically chosen intervals based on program operation counts rather than continuous monitoring. The memory controller performs read operations to assess degradation at predetermined checkpoints, adjusting the write current only when necessary. This periodic approach maintains data sensing reliability while minimizing timing overhead by avoiding excessive read operations.
Solution Approach 2:
The system performs preliminary degradation assessment by monitoring program operation counts and predicting when degradation will affect sensing margin. Instead of waiting for actual sensing failures, the controller proactively adjusts write current parameters before reliability is compromised. This preliminary action reduces the need for frequent corrective read operations, thereby reducing timing overhead while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves data sensing reliability and reduces timing overhead by maintaining or restoring the sensing margin between set and reset data states, thus extending the endurance and retention of resistive memory devices.
Implementation Method 1
a write circuit configured to perform a write operation, by using a write current according to a control voltage, to program the plurality of memory cells into a first resistance state
Data Source
AI summary
A memory controller may control a resistive memory device including memory cells may control the resistive memory device to program the memory cells into a first resistance state, control the resistive memory device to read data from the memory cells that are programmed, receive bit error rates (BER) of the memory cells, occurring in a read operation, from the resistive memory device, may determine the number of program operations on the memory cells corresponding to the BER and may, based on the number of program operations that is determined, control the memory cells to be programmed into the first resistance state by using a write current having a current level higher than that of a minimum write current required for the memory cells to be changed into the first resistance state.