Resistive Memory Array Encryption for Edge Devices
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Solution Overview
Problem
Traditional encryption algorithms require significant CPU computing power and result in high power consumption, making them unsuitable for IoT applications where resources are limited.
Innovation Solution
An encryption method utilizing a resistive memory array to determine target components based on cipher data bits, generating key data from current component values, which reduces computing power and power consumption by implementing a Physical Unclonable Function (PUF) design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional software encryption algorithms are used, then encryption security is achieved, but CPU computing power requirement increases and power consumption increases
Solution Approach 1:
The patent replaces traditional software-based CPU encryption algorithms with a hardware-based resistive memory array system. The encryption process is transformed from software computation to physical hardware operation, where binary data controls selection of memory components whose resistance values are combined to generate key data, thereby reducing power consumption while maintaining security
Solution Approach 2:
The patent changes the operational parameters from CPU computational operations to resistive memory array operations. By utilizing the resistance values of selected memory components as encryption keys and combining them through current values, the system achieves encryption with significantly lower power consumption compared to traditional CPU-based algorithms
2Reliability
If traditional software encryption algorithms are used, then encryption security is achieved, but CPU computing power requirement increases
Solution Approach 1:
The patent replaces traditional software-based CPU encryption algorithms with a hardware-based resistive memory array system. The encryption process is transformed from software computation to physical hardware operation, where binary data controls selection of memory components whose resistance values are combined to generate key data, thereby reducing computing power requirements
Solution Approach 2:
The resistive memory array system performs encryption operations autonomously through its physical characteristics. The binary data directly controls component selection and resistance value combination without requiring external CPU intervention, enabling the hardware to serve its own encryption function with minimal computing power input
3Reliability
If encryption is implemented in edge devices, then information security is improved, but power consumption and cost increase
Solution Approach 1:
The patent employs a resistive memory array that can be implemented as a low-cost, integrated hardware component suitable for edge devices. The system uses simple binary data input and generates encryption keys through physical resistance value combinations, providing affordable encryption capability for resource-constrained devices without requiring expensive high-performance processors
Solution Approach 2:
The patent replaces power-intensive software encryption with hardware-based resistive memory operations, enabling edge devices to perform encryption locally with minimal power consumption, thereby improving information security while maintaining the power constraints of edge computing environments
4Reliability
If encryption is implemented in edge devices, then information security is improved, but cost increases
Solution Approach 1:
The patent employs a resistive memory array that can be implemented as a low-cost, integrated hardware component suitable for edge devices. The system uses simple binary data input and generates encryption keys through physical resistance value combinations, providing affordable encryption capability for resource-constrained devices without requiring expensive high-performance processors
Solution Approach 2:
The resistive memory array serves multiple functions: it acts as both the encryption key generation mechanism and the storage medium. The same hardware component performs both the cryptographic operation and data retention, reducing overall system cost by eliminating the need for separate expensive encryption processors
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces computing power and power consumption, enabling secure encryption in edge devices with lower costs and improved security, suitable for IoT and 5G networks, while also offering radiation resistance and long service life.
Implementation Method 1
determining current values generated by respective columns of components according to the target components
Data Source
AI summary
An encryption method includes: receiving cipher data which is binary data; determining target components in a resistive memory array according to values of respective bits in the cipher data; determining current values generated by respective columns of components according to the target components; and generating key data according to the current values generated by the respective columns of components. The present disclosure can effectively reduce computing power and power consumption of an encryption process in an edge device.