Resistive Memory Field Enhancement Feature
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Solution Overview
Problem
Prior art memristive devices suffer from random conductive path formation between electrodes, leading to device variability and reliability issues due to contamination and randomness in filament/ionic diffusion, affecting uniformity and stability in resistive memory devices.
Innovation Solution
Incorporating a field enhancement (FE) feature that extends from the bottom electrode to confine the switching area and enhance the electric field, combined with a planar interlayer dielectric for electrical isolation and support, reducing the driving voltage and improving uniformity and reliability through controlled electroforming and device operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional memristive device structure is used, then the device can be fabricated with standard processes, but random conductive path formation leads to device variability and reliability issues
Solution Approach 1:
The patent introduces a field enhancement feature with a specific geometry (protruding structure with radius of curvature between 5-50 nm) that creates a localized high electric field region. This local geometric modification concentrates the electric field at the tip of the protrusion, ensuring that conductive filament formation occurs at a precise location rather than randomly throughout the switching layer, thereby improving both reliability and manufacturing precision
Solution Approach 2:
The patent adds a vertical dimension to the electrode structure by creating a protruding field enhancement feature that extends into the switching layer. This three-dimensional structure modifies the electric field distribution from a uniform planar field to a concentrated vertical field at the protrusion tip, controlling the nucleation site of conductive filaments and reducing variability
2Reliability
If high voltage is applied for electroforming, then conductive paths can be formed reliably, but device variability and contamination issues increase
Solution Approach 1:
The patent modifies the electric field distribution parameter by introducing a geometric protrusion that concentrates the field. This allows the electroforming process to occur at lower voltages (reduced by up to 3x compared to planar structures) while maintaining reliable conductive path formation, because the field enhancement factor created by the protrusion geometry amplifies the effective field strength at the switching interface without requiring higher applied voltages
3Manufacturing precision
If the switching area is not confined, then the device structure is simple, but uniformity and stability in resistive memory devices deteriorate
Solution Approach 1:
The patent creates a localized switching region by forming a protruding field enhancement feature that confines the high electric field to a specific area. This geometric modification naturally defines the switching zone at the protrusion tip and surrounding region, ensuring uniform filament formation without requiring additional masking or patterning steps, thus achieving area confinement with minimal added complexity
Solution Approach 2:
The field enhancement protrusion acts as an intermediary structure between the bottom electrode and the switching layer. This intermediate geometric feature serves as a field concentration point that mediates the interaction between the applied voltage and the switching material, confining the electroforming process to a controlled region and improving switching area uniformity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The FE feature enhances the electric field by up to three times, reducing the voltage required for initial electroforming and device activation, resulting in improved uniformity and reliability of memristor arrays, addressing the variability and reliability concerns.
Implementation Method 1
The FE feature enhances the electric field by up to three times, reducing the voltage required for initial electroforming and device activation
Implementation Method 2
This energy generates a combination of electric field and thermal effects that can modulate the conductivity of both non-volatile switch and non-linear select functions in a memristive element
Data Source
AI summary
A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.


