Resistive Memory Flash Emulation via Busy Time Control
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Solution Overview
Problem
Existing semiconductor storage apparatus, such as resistive random access memory, lack the capability to emulate an erasing operation of a flash memory, making it difficult to effectively apply software assets designed for flash memory to these devices.
Innovation Solution
A semiconductor storage apparatus is designed with a memory cell array, a control component, a setting component, and an adjustment component. The setting component allows the apparatus to receive and emulate an erasing command of a flash memory, while the adjustment component adjusts the busy time to control the busy information, mimicking the erasing operation of a flash memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a resistive random access memory is used instead of flash memory, then writing speed is improved and power consumption is reduced, but compatibility with flash memory software is lost
Solution Approach 1:
The patent implements a copying principle by creating a virtual flash memory interface layer that copies the command set and operational behavior of flash memory. The conversion unit translates flash memory commands (read, write, erase) into equivalent operations for the resistive random access memory, allowing existing flash memory software to operate unchanged on the new memory technology while maintaining the speed and power benefits of the resistive memory.
2Adaptability or versatility
If flash memory erasing operation is implemented, then data rewriting capability is improved, but operation time is increased
Solution Approach 1:
The patent applies preliminary action by pre-translating and preparing command conversions in the conversion unit before execution. When a flash memory erasing command is received, the conversion unit immediately translates it into the appropriate resistive random access memory operation, and the system pre-manages the busy signal timing to simulate the erasing duration. This allows the host device to perceive the expected operation time while the actual physical operation benefits from the faster resistive memory characteristics.
Data Source
AI summary
A semiconductor storage apparatus having a function of emulating an erasing operation of a flash memory is provided. A resistive random access memory of the disclosure includes: a memory cell array; a controller that reads or writes the memory cell array according to an input of command; an erasing command allowance register that sets whether or not to receive an erasing command; and a busy time adjustment register that adjusts a busy time. In a case of setting to allow a reception of the erasing command, the controller responds to an input of the erasing command to emulate the erasing operation, and specifies busy information including the busy time adjusted by the busy time adjustment register.