Resistive Memory Selective Write Strategy for Endurance and Power
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Solution Overview
Problem
Conventional resistive memory cells with 2T2R architecture improve cycling endurance but require a large circuit area, increasing costs, necessitating a design that balances cost and endurance.
Innovation Solution
A resistive memory system that generates inverted write-in data and compares it with current data to select the optimal write-in data, reducing the number of memory cells that need to be written to, thereby minimizing power consumption and enhancing cycling endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional 2T2R architecture is used to improve cycling endurance, then cycling endurance is improved, but circuit area increases leading to higher costs
Solution Approach 1:
The patent segments the write operation into two phases: first writing data to a first set of memory cells, then writing inverted data to a second set of memory cells. This segmentation allows the system to achieve improved cycling endurance through selective writing without requiring the full 2T2R architecture in all cells, thereby reducing overall circuit area while maintaining reliability.
Solution Approach 2:
The patent applies partial action by selectively writing to only certain memory cells based on the content of the data. When data contains a predetermined pattern (such as all zeros or all ones), the system performs partial writing operations rather than writing to all cells, which reduces wear on memory cells and extends cycling endurance without requiring increased circuit area.
2Reliability
If data is written to all memory cells, then data is fully updated, but power consumption increases
Solution Approach 1:
The patent implements partial writing by determining whether the data to be written contains a predetermined pattern. When such a pattern is detected, the system performs writing operations only on a subset of memory cells rather than all cells, thereby significantly reducing power consumption while still ensuring data accuracy through the selective update strategy.
Solution Approach 2:
The memory system performs self-service by automatically detecting patterns in the data and autonomously deciding whether to perform full or partial write operations. This self-service mechanism reduces power consumption by avoiding unnecessary write operations to memory cells that would not change state, while maintaining data integrity through intelligent selection of write targets.
Data Source
AI summary
A resistive memory and a method for writing data thereof are provided. The method for writing data includes: receiving a write-in data and generating an inverted write-in data; reading a current data in a plurality of selected memory cells; comparing the current data with the write-in data and the inverted write-in data; selecting the write-in data or the inverted write-in data to generate a final data according to a comparison result; and writing the final data into the selected memory cells.