Resistive Memory Device Isolation Structure for Sneak Current Leakage
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Solution Overview
Problem
High-density resistive random access memory devices with a single transistor connected to multiple memories (1TnR structure) face sneak current leakage issues, leading to reduced reliability due to adjacent memory interference.
Innovation Solution
The resistive memory device incorporates an isolation structure between doped regions to act as a switch, controlling the transmission path between the resistive memory and transistor, thereby cutting off sneak current leakage and allowing accurate reading of the selected memory's current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single transistor is connected with multiple memories (1TnR structure) to achieve high memory capacity under the same area, then memory density is improved, but sneak current leakage occurs causing adjacent memories to affect each other and reliability is reduced
Solution Approach 1:
The patent divides the doped region into multiple isolated segments (first doped region, second doped region, third doped region) separated by isolation structures. This segmentation prevents sneak current from propagating between adjacent memory cells while maintaining the 1TnR high-density structure, thus resolving the contradiction between memory capacity and reliability
Solution Approach 2:
The isolation structure acts as an intermediary element between the doped regions. It selectively blocks sneak current paths while allowing legitimate signal transmission through the transistor, thereby preventing adjacent memory interference without compromising the high-density 1TnR architecture
2Reliability
If an isolation structure is added between doped regions to block sneak current, then reliability is improved, but device complexity increases
Solution Approach 1:
The isolation structures are merged with the existing substrate and doped region formation processes. The isolation regions are created as integral parts of the substrate structure during the same fabrication steps, avoiding additional complex processing layers and maintaining manufacturing simplicity while achieving reliable sneak current blocking
3Reliability
If isolation structures are used to control transmission paths, then sneak current leakage is prevented, but manufacturing process complexity increases
Solution Approach 1:
The isolation structures are formed preliminarily during the substrate preparation stage, before the doped regions and transistor structures are created. This preliminary formation integrates the isolation function into the base substrate, eliminating the need for additional mask steps and complex post-processing, thus maintaining ease of manufacture while ensuring accurate current reading
Data Source
AI summary
A resistive memory device including a substrate, an isolation structure, a word line, a source line, a bit line and a resistive memory is provided. The substrate includes a body region, and first, second and third doped regions, the first and second doped regions are spaced apart from each other by the body region. The isolation structure is disposed in the substrate, and the second doped region and the third doped region are spaced apart from each other by the isolation structure. The word line is disposed on the substrate, the first and second doped regions are located at opposite sides of the word line, and the first and third doped regions are located at the opposite sides of the word line. The source line is disposed on the substrate and electrically connected with the first doped region. The bit line and the resistive memory are disposed on the substrate, and the third doped region is electrically connected with the bit line via the resistive memory.