Resistive Memory Layer Patterning via Interfacial Conductive Barrier
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Solution Overview
Problem
In semiconductor device manufacturing, achieving uniformity of resistive memory layers is crucial for high-quality memory devices, but existing methods face challenges in maintaining resistance characteristics and preventing non-uniform interfacial contact resistance due to direct contact between the resistive memory layer and the carbon-containing layer, leading to potential damage and operational characteristic variations in memory cells.
Innovation Solution
A method involving the sequential formation of an interfacial conductive layer, an etch stop layer, and a main conductive layer, with a carbon-containing layer acting as an etch stop and adhesive layer, is employed to pattern the resistive memory layer using an upper electrode structure as an etch mask, ensuring controlled etching and preventing ion or carbon penetration, thereby maintaining resistance uniformity and preventing damage to the resistive memory layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the resistive memory layer is directly contacted with the carbon-containing layer, then the manufacturing process is simplified, but the resistance uniformity deteriorates and interfacial contact resistance becomes non-uniform
Solution Approach 1:
An interfacial conductive layer is introduced between the resistive memory layer and the carbon-containing etch stop layer. This intermediary layer prevents direct contact between the resistive memory layer and carbon, thereby maintaining resistance uniformity and preventing non-uniform interfacial contact resistance while still enabling the manufacturing process to proceed.
2Ease of manufacture
If the resistive memory layer is directly contacted with the carbon-containing layer, then the manufacturing process is simplified, but the reliability deteriorates due to potential damage and operational characteristic variations
Solution Approach 1:
The interfacial conductive layer serves as a protective intermediary that prevents carbon from the etch stop layer from penetrating into and damaging the resistive memory layer. This ensures the reliability and operational consistency of memory cells by preventing unwanted reactions and maintaining the integrity of the resistive memory layer during the etching process.
3Manufacturing precision
If the resistive memory layer uniformity is improved by adding protective layers, then the reliability is improved, but the device complexity increases
Solution Approach 1:
The barrier layer is segmented into multiple functional sub-layers: an interfacial conductive layer for protection and conductivity, and a carbon-containing etch stop layer for controlled etching. This segmentation allows each layer to perform its specific function efficiently, improving resistive memory layer uniformity while keeping the overall structure manageable through clear functional division.
Data Source
AI summary
A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.