Cross Point Resistive Memory Leakage Current Compensation
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Solution Overview
Problem
Resistive memory devices face challenges in maintaining the reliability of read operations due to leakage currents from unselected memory cells, which can lead to increased voltage on selected word lines and result in read errors.
Innovation Solution
A memory device and operating method that precharge selected and unselected word lines to specific voltages, with the unselected word lines receiving a second voltage that is higher than the unselected bit lines, to compensate for leakage currents and prevent voltage increases on selected word lines, thereby improving read operation reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If unselected word lines are left floating or precharged to low voltage during read operation, then device complexity is reduced, but leakage current from unselected memory cells increases voltage on selected word lines causing read errors
Solution Approach 1:
The patent applies preliminary action by precharging unselected word lines to a second voltage level before the read operation begins. This advance preparation ensures that when the selected word line experiences voltage increase due to leakage current, the unselected word lines are already at an appropriate voltage level to prevent their associated memory cells from turning on, thereby maintaining read operation reliability.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the voltage levels on unselected word lines during different phases of the read operation. Specifically, unselected word lines are precharged to a second voltage level during the precharge phase, and then switched to a third voltage level during the read phase. This parameter adjustment allows the system to compensate for leakage current effects without requiring complex additional circuitry.
2Reliability
If higher voltage is applied to unselected word lines to compensate for leakage current, then read operation reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by differentiating voltage levels across different word lines based on their selection status. Selected word lines receive a first voltage level, while unselected word lines receive a second voltage level that is higher than the first but optimized to prevent leakage current effects. This localized voltage differentiation allows compensation for leakage current only where necessary (on unselected word lines), rather than increasing voltage system-wide, thereby controlling power consumption.
3Reliability
If voltage levels are optimized to prevent read errors, then read operation reliability is improved, but the read window may be reduced
Solution Approach 1:
The patent implements dynamics by making the voltage levels on word lines time-dependent and operation-phase-dependent. During the precharge phase, unselected word lines are set to a second voltage level, and during the read phase, they are switched to a third voltage level. This dynamic adjustment allows the system to maintain an optimal read window by adapting voltage levels to the specific timing and requirements of each operation phase, rather than using fixed voltage levels that would compromise either reliability or read window.
Data Source
AI summary
A memory device and an operating method of the memory device, the memory device including a memory cell array including a plurality of memory cells respectively arranged at points at which a plurality of word lines and a plurality of bit lines cross; and a control logic circuit configured to precharge a selected word line connected to a selected memory cell and precharge a selected bit line connected to the selected memory cell in a read operation, wherein the control logic circuit is further configured to precharge a first unselected word line among unselected word lines to a second voltage when the selected word line is precharged to a first voltage, a level of the first voltage is lower than a level of a third voltage applied to an unselected bit line when the selected word line is precharged to the first voltage, and a level of the second voltage is higher than the level of the third voltage.