Resistive Memory Device Local Compute Operations
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Solution Overview
Problem
As the size and quantity of data stored by memory devices increase, transferring data to and from the host becomes time-consuming and resource-intensive, leading to increased processing time and resource consumption, particularly when performing memory operations on large data blocks.
Innovation Solution
Implementing a selectively operable memory device with a processing unit resident on the memory device, allowing for operations to be performed locally, such as data reduction or processing, before transferring relevant data to the host, thereby reducing the amount of data and clock cycles required, and enabling efficient data transfer and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred to and from the host through conventional memory operations, then data storage and retrieval are achieved, but processing time and resource consumption increase significantly when handling large data blocks
Solution Approach 1:
The patent introduces a new operational dimension by enabling the memory device to perform compute operations directly within the memory array. This spatial dimensionality change allows data processing to occur at the location of data storage rather than requiring sequential transfer to external processing units, thereby reducing processing time and improving data transfer efficiency simultaneously
Solution Approach 2:
The memory device is designed with multi-functionality, capable of operating in both traditional memory modes (read/write operations) and compute modes (performing calculations directly on stored data). This universal design allows the same hardware to adapt to different operational requirements, improving productivity while managing processing time effectively
2Reliability
If all stored data is transferred to the host for processing, then complete data access is achieved, but the amount of data transferred and resources consumed increase unnecessarily
Solution Approach 1:
The patent extracts only the necessary data from the memory device for transfer to the host, rather than transferring all stored data. By performing compute operations within the memory device, the system can process and identify only the relevant data portions that need to be transferred, thereby maintaining data access completeness while significantly reducing power consumption associated with data transfer
Solution Approach 2:
The memory device performs preliminary compute operations on the data before it is transferred to the host. This preliminary processing allows the system to prepare, filter, or reduce the data set in advance, ensuring that only the necessary data is transferred. This approach maintains reliability of data access while minimizing the energy loss from transferring unnecessary data
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the time and power consumption associated with data transfer and processing by performing operations on or near the memory device, allowing for faster data transfer and reduced resource usage, especially when only pertinent data is transferred to the host.
Implementation Method 1
receiving, by a resistance variable memory device, a command to operate the resistance variable memory device in a first mode or a second mode
Data Source
AI summary
Systems, apparatuses, and methods related to a selectively operable memory device are described. An example method corresponding to a selectively operable memory device can include receiving, by a resistance variable memory device, a command to operate the resistance variable memory device in a first mode or a second mode and operating the resistance variable memory device in the first mode or the second mode based, at least in part, on the received command to perform, in the first mode, a read operation or a write operation, or both, or, in the second mode, a compute operation. The method can further include performing, using a processing unit resident on the resistance variable memory device, the compute operation, the testing operation, or both based, at least in part, on a determination that the resistance variable memory device is operating in the second mode.