Resistive Memory NAND Structure Parallel Access
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Solution Overview
Problem
Existing phase change memory (PCM) devices and content addressable memory (CAM) technologies face challenges in efficiently programming and accessing resistive memory cells, particularly in reducing the required reset voltage level and optimizing power consumption during operations.
Innovation Solution
The implementation of resistive memory cells in a NAND configuration, where each cell includes a memory element access device connected in parallel to a resistive memory element, allows for parallel programming and reduced power consumption by sequential threshold switching, enabling efficient reset and set operations with lower voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If resistive memory cells are programmed using conventional NOR configuration, then programming operations can be performed, but higher voltage levels are required and power consumption increases
Solution Approach 1:
The patent inverts the conventional NOR configuration by implementing a NAND configuration where the access device is placed in parallel with the resistive memory element rather than in series. This inversion allows the memory cell to be programmed by sequentially turning off access devices, enabling lower voltage operation and reduced power consumption while maintaining programming functionality.
Solution Approach 2:
The patent changes the operational parameters by introducing sequential threshold switching where access devices are turned off one at a time in a controlled sequence. This parameter change enables the memory cells to be programmed at lower voltage levels compared to conventional simultaneous programming methods, directly reducing power consumption during programming operations.
2Productivity
If reset voltage level is reduced, then power consumption decreases, but programming efficiency may be compromised
Solution Approach 1:
The patent applies preliminary action by pre-configuring the access devices in a specific sequence before programming operations. The access devices are turned off in a predetermined sequence during the programming process, which prepares the memory cell structure to accept lower voltage programming signals while ensuring efficient and complete programming of the resistive memory elements.
Solution Approach 2:
The patent changes the voltage parameter dynamically during the programming process by sequentially activating different access devices. This allows the system to use lower voltage levels for programming operations while maintaining programming efficiency, as the sequential activation pattern ensures that current flows through the appropriate paths to successfully program the memory cells without requiring high voltage.
3Use of energy by moving object
If sequential threshold switching is implemented, then lower voltage levels are required, but access device control complexity increases
Solution Approach 1:
The patent merges the control of multiple access devices into a unified sequential control mechanism. Instead of independently controlling each access device, the system uses a coordinated sequence where access devices are turned off in a predetermined order based on their position in the memory cell string. This merging approach reduces the overall control complexity while enabling sequential threshold switching for lower voltage operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in increased system throughput, power savings, and reduced reset voltage requirements, enhancing the performance and efficiency of PCM and CAM devices.
Implementation Method 1
The structure of the material can change rapidly back and forth between amorphous and crystalline on a microscopic scale. In the amorphous or disordered phase, the material has a high electrical resistance; in the crystalline or ordered phase, its resistance is reduced.
Implementation Method 2
This allows electrical currents to be switched on and off, representing digital high and low states.
Data Source
AI summary
Resistive memories having a not-and (NAND) structure including a resistive memory cell. The resistive memory cell includes a resistive memory element for storing a resistance value and a memory element access device for controlling access to the resistive memory element. The memory element access device is connected in parallel to the resistive memory element.