Resistive Memory Reference Cell Offset Current Compensation

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Solution Overview

Problem

Resistive memory devices face challenges in accurately reading values stored in memory cells due to variations in resistance caused by process voltage temperature (PVT) fluctuations, leading to scattering of resistance values which interfere with data reading.

Innovation Solution

A resistive memory device is designed with a cell array, a reference cell, a reference resistance circuit, an offset current source circuit, and a control circuit that compensates for resistance variations by adjusting the offset current to ensure accurate data reading. This includes generating a reference current by adding or drawing an offset current from a read current and using it to determine the value stored in the memory cell.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a read current is supplied to detect data in a memory cell, then data reading is enabled, but resistance scattering due to PVT variations interferes with accurate reading

Engineering Contradiction:
Improvedata reading accuracyVSAvoidresistance variation stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

A reference cell is introduced as an intermediary element that experiences the same PVT variations as the memory cell but does not store data. By comparing the voltage from the memory cell with the voltage from the reference cell, the system can cancel out the resistance scattering effects caused by PVT variations, thereby improving reading accuracy without compromising reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system uses the voltage difference between the memory cell and reference cell as feedback to determine the stored data. The control circuit adjusts the read operation based on this comparison, effectively compensating for resistance variations and maintaining both measurement precision and reliability

Inventive Principle:
Principle #23Feedback

2Measurement precision

If resistance variations are compensated using a reference cell and offset current, then reading accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvereading accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The reference cell serves multiple functions: it acts as a comparison element for voltage measurement, a sensor for PVT variations, and a basis for generating offset current compensation. This multi-functionality allows the system to achieve high reading accuracy without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system dynamically adjusts the offset current parameter based on the voltage difference between memory and reference cells. By changing the current parameter in response to detected variations, the system compensates for resistance scattering without requiring complex structural modifications

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively compensates for resistance variations, enhancing the accuracy of data reading in resistive memory devices by using a reference current to adjust the reference voltage, thereby improving the reliability of data retrieval.

Implementation Method 1

a variable resistance element... the resistances of variable resistive elements may be scattered... a read current may be supplied to the memory cell, and a voltage due to the read current and a variable resistive element of the memory cell may be detected

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS10510393B2Resistive memory device including reference cell and operating method thereof
Publication Date: 2019.12.17 SAMSUNG ELECTRONICS CO LTD
  • US10510393B2 patent drawing
  • US10510393B2 patent drawing
  • US10510393B2 patent drawing

AI summary

Provided is a resistive memory device configured to output a value stored in a memory cell in response to a read command, the resistive memory device including a cell array including the memory cell and a reference cell; a reference resistance circuit configured to be electrically connected to the reference cell; an offset current source circuit configured to add or draw an offset current to or from a read current provided to the reference resistance circuit; and a control circuit configured to control the offset current source circuit to compensate for a variation of a resistance of the memory cell.