Resistive Memory Pre-Read Selective Erase Reliability
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Solution Overview
Problem
Next-generation memory devices require high integrity, non-volatile, and high-speed characteristics, but existing resistive memory devices face challenges in data reliability and power consumption, particularly in distinguishing between reset and set write operations and optimizing erase operations.
Innovation Solution
A method for operating resistive memory devices involves performing pre-read operations, comparing data, and selectively applying erase and set-direction programming to variable resistors in memory cells, distinguishing between reset and set write operations, and skipping unnecessary erase operations to improve data reliability and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If erase operations are performed on all memory cells before write operations, then write operation reliability is improved, but power consumption increases and device durability decreases
Solution Approach 1:
The patent applies preliminary action by performing a pre-read operation before the write operation to determine the current state of memory cells. Based on this preliminary information, the system selectively performs erase operations only on cells that need them, rather than erasing all cells universally. This reduces unnecessary erase operations, thereby lowering power consumption and extending device durability while maintaining write reliability.
Solution Approach 2:
The patent implements partial action by selectively applying erase operations only to the subset of memory cells that require it, rather than performing a complete erase of all cells. The pre-read operation identifies which cells need erasing before writing, allowing the system to perform only the necessary erase operations, thus reducing overall power consumption and avoiding excessive wear on the device.
2Reliability
If erase operations are performed on all memory cells before write operations, then write operation reliability is improved, but the number of operations increases reducing device durability
Solution Approach 1:
The patent uses preliminary action through the pre-read operation to identify which memory cells actually require erase operations before writing. By determining the current state of each cell beforehand, the system can selectively erase only the necessary cells, reducing the total number of erase operations performed on the device over time, thereby extending durability while maintaining write reliability.
Solution Approach 2:
The patent applies partial action by performing erase operations only on the subset of memory cells that need them, rather than universally erasing all cells. This selective approach reduces the cumulative number of erase operations across the device population, minimizing wear and extending device durability while still ensuring write reliability for cells that do require erasing.
3Productivity
If pre-read operation is performed before write operation, then selective erase operation is enabled improving efficiency, but additional operation time is required
Solution Approach 1:
The patent applies preliminary action by performing a pre-read operation before the write operation to determine which memory cells need erasing. This preliminary state determination enables the system to optimize the subsequent write operation by performing selective erases only where needed, improving overall efficiency. While it adds some initial time, the reduction in unnecessary erase operations and subsequent write operations results in net time savings.
4Reliability
If resistance values are increased by erase operation and then decreased by set-direction programming, then reset write operation is achieved, but additional programming steps are required
Solution Approach 1:
The patent uses preliminary action by first determining through pre-read which cells need reset operations, then selectively applying erase operations to increase resistance values only for those cells. This targeted approach followed by set-direction programming to decrease resistance achieves reliable reset operations while minimizing unnecessary programming steps on cells that don't require resetting.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data reliability and reduces power consumption by optimizing write operations in resistive memory devices, improving durability and efficiency by minimizing the number of erase operations and distinguishing between different resistance states effectively.
Implementation Method 1
Each of the one or more first memory cells and the one or more second memory cells may include a variable resistor. The reset write operation may be a write operation that increases a resistance value of the variable resistor, and the set write operation may be a write operation that decreases the resistance value of the variable resistor.
Data Source
AI summary
Provided are a resistive memory device and a method of the resistive memory device. The method of operating the resistive memory device includes performing a pre-read operation on memory cells in response to a write command; performing an erase operation on one or more first memory cells on which a reset write operation is to be performed, determined based on a result of comparing pre-read data from the pre-read operation with write data; and performing set-direction programming on at least some memory cells from among the erased one or more first memory cells and on one or more second memory cells on which a set write operation is to be performed.