Resistive Memory PUF Circuit for Low-Error Authentication
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Solution Overview
Problem
Conventional Physically Unclonable Function (PUF) circuits face challenges in scaled geometries, including high false rejection and acceptance rates due to transistor threshold voltage variations, necessitating an alternative scheme to maintain ideal PUF performance.
Innovation Solution
The implementation of a PUF circuit using a resistive memory device, such as a magnetic tunnel junction (MTJ) based device, with an analog-to-digital converter (ADC) and auto-zeroing comparator, which generates unique challenge-response pairs for authentication, leveraging manufacturing variations to create a unique signature without error.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PUF circuits are used, then device complexity is reduced, but reliability deteriorates due to high false rejection and acceptance rates
Solution Approach 1:
The patent changes the fundamental parameter used for PUF generation from transistor threshold voltage to resistive memory device resistance values. This parameter change enables more stable and reliable challenge-response pairs with lower false rejection and acceptance rates, while the resistive memory devices can be integrated into existing circuit architectures.
Solution Approach 2:
The patent substitutes the conventional transistor-based PUF mechanism with a resistive memory device-based mechanism. This substitution replaces the reliance on transistor threshold voltage variations with resistive memory device resistance variations, achieving improved reliability without significantly increasing overall device complexity.
2Manufacturing precision
If scaled geometries are used, then device area is reduced, but manufacturing precision deteriorates due to increased variations
Solution Approach 1:
The patent changes from using transistor threshold voltage (which is highly sensitive to manufacturing variations in scaled geometries) to using resistive memory device resistance values. The resistive memory devices exhibit more stable resistance characteristics that are less affected by scaling-induced manufacturing variations, thereby improving manufacturing precision while maintaining small device area.
3Reliability
If conventional PUF circuits are used, then device area is minimized, but signature strength deteriorates
Solution Approach 1:
The patent changes the underlying parameter from transistor threshold voltage to resistive memory device resistance, which provides more stable and stronger signatures. The resistive memory devices can generate challenge-response pairs with higher entropy and better uniqueness, improving signature strength while requiring minimal additional area due to the compact nature of resistive memory devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in smaller physical dimensions, higher signature strength, and improved false rejection and acceptance rates, achieving identical or better performance compared to conventional PUF circuits while reducing the area required for signature generation.
Implementation Method 1
leveraging manufacturing variations to create a unique signature without error
Implementation Method 2
a magnetic tunnel junction (MTJ) based device
Data Source
Figure 1A~1C
Figure 2
Figure 3
AI summary
Described is a physically unclonable functional circuit comprising: a resistive memory device (e.g., an MTJ device) having at least two terminals; a transistor coupled to one of the at least two terminals of the resistive memory device; and an analog-to-digital converter (ADC) having an input coupled to the one of the at least two terminals of the resistive memory device.