Resistive Memory PUF for Secure IoT Authentication

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Solution Overview

Problem

Current non-volatile memory devices face challenges in providing secure encryption and mutual authentication due to vulnerabilities in encryption keys, particularly against side-channel attacks, and require low power consumption and small form factor for integration into IoT devices.

Innovation Solution

A non-volatile memory device with a physically unclonable function (PUF) that generates individual identification information based on the resistance variations of resistive memory cells, using a read circuit to obtain time information from memory cells and a data generation circuit to create unique digital ID data, enhancing security and resistance to side-channel attacks while minimizing power consumption and space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If encryption techniques based on program processing are used, then security level is improved, but vulnerability to side-channel attacks increases

Engineering Contradiction:
Improvesecurity levelVSAvoidvulnerability to side-channel attacks
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces software-based encryption mechanisms with a hardware-level physically unclonable function (PUF) that exploits physical variations in resistive memory cells. This substitution moves security from the software domain to the physical domain, making attacks requiring observation of physical states (side-channel attacks) ineffective.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent utilizes inherent parameter variations (resistance values) among memory cells that are uncontrollable and non-reproducible. These physical parameters serve as the basis for generating unique identification information, transforming uncontrollable physical variations into a security advantage that prevents cloning.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If PUF function is implemented using memory cells with variable resistance values, then individual identification information generation is improved, but power consumption increases

Engineering Contradiction:
Improveindividual identification information generationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent makes the memory cell array serve dual functions: storing user data and generating PUF-based identification information. By utilizing the same hardware infrastructure for both purposes, the patent avoids adding separate dedicated PUF circuitry that would increase power consumption, while still achieving secure identification.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory cells themselves provide the PUF function through their inherent resistance variations without requiring external specialized components. The system uses the natural physical properties of the memory cells to generate identification information, eliminating the need for additional energy-intensive PUF generation hardware.

Inventive Principle:
Principle #25Self-service

3Reliability

If PUF function is implemented using memory cells with variable resistance values, then individual identification information generation is improved, but device area increases

Engineering Contradiction:
Improveindividual identification information generationVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent makes the memory cell array serve dual functions: storing user data and generating PUF-based identification information. By utilizing the same hardware infrastructure for both purposes, the patent avoids adding separate dedicated PUF circuitry that would increase device area, while still achieving secure identification.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the data storage function and PUF generation function into a single integrated system. The memory cell array is combined to perform both user data storage and secure identification generation, eliminating the need for separate physical components and reducing overall device footprint.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides secure and stable digital ID data generation with high randomness and resistance to side-channel attacks, suitable for low-power IoT devices, ensuring secure encryption and authentication without physical reproduction.

Implementation Method 1

The read circuit obtains each of the pieces of time information on a basis of a discharge phenomenon or charge phenomenon that depends on the resistance value of a corresponding one of the memory cells

Methodology Applied
Scientific EffectDischarge phenomenon:

Implementation Method 2

The read circuit obtains each of the pieces of time information on a basis of a discharge phenomenon or charge phenomenon that depends on the resistance value of a corresponding one of the memory cells

Methodology Applied
Scientific EffectCharge phenomenon:

Data Source

PatentUS9892783B2Non-volatile memory device including memory cells having variable resistance values
Publication Date: 2018.02.13 PANASONIC SEMICON SOLUTIONS CO LTD
  • US9892783B2 patent drawing
  • US9892783B2 patent drawing
  • US9892783B2 patent drawing

AI summary

A non-volatile memory device comprises: a memory cell array that includes one or more memory groups each including memory cells, each of the memory cells having variable resistance value to hold a piece of data; a read circuit that, for each of the one or more memory groups, performs a read operation to obtain pieces of time information related to the memory cells in the memory group; and a data generation circuit that generates individual identification information on a basis of order of the memory cells in each of the one or more memory groups, the order corresponding to ascending order or descending order of the pieces of time information related to the memory cells in the memory group. The read circuit obtains each of the pieces of time information on a basis of a discharge phenomenon or charge phenomenon that depends on the resistance value of a corresponding one of the memory cells.