Resistive Memory Write Pulse Adjustment
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Solution Overview
Problem
Nonvolatile memory devices using resistance materials face inefficiencies in write/verify operation loops, leading to increased complexity and time in data storage.
Innovation Solution
A driving method for nonvolatile memory devices that adjusts the start pulse based on previous write operations, using incremental or decremental one-way write methods, and employs multiple verify reference values to reduce the number of write/verify loops, optimizing the write operation by varying the write current in each loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional write/verify operation loops are used in nonvolatile memory devices, then data storage reliability is maintained, but the number of operation loops increases leading to increased complexity and time consumption
Solution Approach 1:
The patent applies preliminary action by adjusting the start pulse based on previous write operation results before initiating the next write/verify loop. The controller predicts the optimal start pulse value using feedback from prior operations, thereby reducing the number of loops needed while maintaining data storage reliability. This predictive adjustment eliminates the need for extensive trial-and-error loops.
2Reliability
If traditional write/verify operation loops are used in nonvolatile memory devices, then data storage reliability is maintained, but the operation time increases
Solution Approach 1:
The patent implements feedback mechanisms where the controller monitors the results of previous write operations and uses this information to adjust the start pulse for subsequent operations. By incorporating feedback from verify results and previous write performance, the system optimizes the write/verify loop count, thereby reducing operation time while preserving data storage reliability.
3Ease of operation
If fixed start pulse values are used in write operations, then operation simplicity is maintained, but write operation efficiency is reduced
Solution Approach 1:
The patent applies dynamics by transitioning from fixed start pulse values to dynamically adjusted start pulse values. The controller modifies the start pulse based on previous write operation results, phase-change material state, and verify outcomes. This dynamic adjustment optimizes write operation efficiency for different data patterns and material states while maintaining operational simplicity through automated control.
Solution Approach 2:
The patent implements parameter changes by varying the start pulse magnitude and duration based on previous write operation performance. The controller adjusts these parameters dynamically to optimize write efficiency for different scenarios (e.g., crystalline vs. amorphous phase transitions) while keeping the overall operation simple through automated parameter selection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the number of write/verify operation loops, enhancing data storage efficiency and reducing the complexity of write operations in nonvolatile memory devices.
Implementation Method 1
a phase-change material of a PRAM becomes a crystalline state or an amorphous state as it is cooled after being heated
Data Source
AI summary
Driving methods of a nonvolatile memory device are provided. The driving method includes providing a start pulse adjusted based on a previous write operation to a resistive memory cell to write data, verifying whether the data has accurately been written using the start pulse, and executing a write operation on the resistive memory cell by an incremental one-way write method or a decremental one-way write method according to the verify result. Related nonvolatile memory devices are also provided.