Resistive Memory Redundancy via Segmented Switching
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Solution Overview
Problem
Resistance change memory cells require reversible and irreversible switching capabilities to efficiently manage data storage in next-generation nonvolatile semiconductor memories, but existing technologies face challenges in achieving reliable and efficient multi-state resistive switching.
Innovation Solution
A semiconductor integrated circuit design incorporating a resistance change film between two electrodes, controlled by a circuit that applies specific potential differences to switch between reversible set, reversible reset, irreversible set, and irreversible reset states, utilizing materials like metal oxides and conductive semiconductors to enable reliable data storage operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If reversible switching is implemented for work memory applications, then data storage flexibility is improved, but switching reliability deteriorates due to difficulty in achieving consistent multi-state resistive switching
Solution Approach 1:
The memory system is segmented into two distinct types of memory cells: first memory cells with irreversible switching characteristics for storing redundancy information, and second memory cells with reversible switching characteristics for storing work data. This segmentation allows each cell type to be optimized for its specific function, with irreversible cells providing reliable defect mapping and reversible cells providing flexible data storage, thereby resolving the contradiction between flexibility and reliability
Solution Approach 2:
The patent applies excessive action by using irreversible switching in a subset of memory cells (first memory cells) dedicated to redundancy storage, while maintaining reversible switching in other cells (second memory cells) for work data. This partial application of irreversible switching ensures that critical redundancy information is reliably stored without requiring all memory cells to achieve complex multi-state reversibility, thus improving overall system reliability while preserving data storage flexibility
2Reliability
If irreversible switching is used for redundancy storage, then defect mapping reliability is improved, but data retrieval flexibility worsens due to inability to reset the state
Solution Approach 1:
The memory array is segmented into first memory cells for irreversible redundancy storage and second memory cells for reversible work data storage. The control circuit selectively activates appropriate cell types based on operation mode, allowing irreversible cells to provide reliable defect mapping while reversible cells maintain data retrieval flexibility, thus resolving the contradiction between reliability and adaptability
Solution Approach 2:
The memory system achieves multi-functionality by enabling the same memory device to perform both irreversible switching operations (for redundancy and defect mapping) and reversible switching operations (for work data storage and retrieval). The control circuit manages different operation modes, allowing the system to function as both a reliable redundancy storage medium and a flexible work memory, thereby resolving the contradiction between defect mapping reliability and data retrieval flexibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient and reliable switching between multiple resistive states, enhancing data storage capabilities and addressing the limitations of existing resistance change memory technologies by ensuring reversible and irreversible operations, thus improving the performance of resistance change memory cells.
Implementation Method 1
a resistance change film (RE) connected between the first electrode (11) and the second electrode (12) and being reversibly changeable between first and second resistive states
Implementation Method 2
The control circuit irreversibly fixes the memory cell to a third resistive state by applying a fifth potential to the first electrode and by applying a sixth potential greater than the fifth potential to the second electrode
Data Source
AI summary
According to one embodiment, a semiconductor integrated circuit includes a memory cell including first and second electrodes and a resistance change film therebetween, and a control circuit controlling a potential difference between the first and second electrodes. The control circuit reversibly changes the memory cell to a first resistive state by applying a first potential to the first electrode and by applying a second potential smaller than the first potential to the second electrode. The control circuit reversibly changes the memory cell to a second resistive state by applying a third potential to the first electrode and by applying a fourth potential smaller than the third potential to the second electrode.