Resistive Memory Refresh Read Operation Using Reference Voltage Margin
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Solution Overview
Problem
Resistive memory devices experience data corruption over time or due to environmental changes, leading to reliability issues as they require frequent reprogramming, which decreases their effectiveness.
Innovation Solution
A method and system for refreshing resistive memory devices by performing a refresh read operation to assess the condition of each memory unit, determining if a refresh is needed, and adjusting the reference voltage to detect potential data corruption earlier, thereby reducing unnecessary refresh operations and maintaining data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference voltage with large margin is used for normal read operation, then reading accuracy is improved, but data corruption detection capability is reduced
Solution Approach 1:
The patent divides the read operation into two distinct types: normal read operation using a first reference voltage for accurate data reading, and refresh read operation using a second reference voltage with smaller margin for detecting data corruption. This segmentation allows each operation to use optimized reference voltages for their specific purposes, resolving the contradiction between reading accuracy and data corruption detection capability.
Solution Approach 2:
The patent changes the reference voltage parameter based on the operation type. For normal read operations, a first reference voltage with large margin is used to ensure reading accuracy. For refresh operations, a second reference voltage with smaller margin is used to enhance data corruption detection. This parameter change allows the system to optimize both reading accuracy and data corruption detection capability in their respective contexts.
2Reliability
If frequent refresh operations are performed to maintain data reliability, then data corruption is reduced, but time consumption and productivity are worsened
Solution Approach 1:
The patent performs a refresh read operation periodically to check the condition of memory units before actual data corruption occurs. By using a reference voltage with smaller margin, the system can detect potential data corruption early and perform refresh operations only when necessary, rather than continuously. This preliminary detection action reduces unnecessary refresh operations and minimizes time consumption while maintaining data reliability.
Solution Approach 2:
The patent implements a feedback mechanism where the result of the refresh read operation is used to determine whether an actual refresh operation is needed. The refresh controller compares the data read during the refresh read operation with the stored data and only performs a full refresh operation if data corruption is detected. This feedback-based approach ensures that refresh operations are performed only when necessary, reducing time consumption while maintaining data reliability.
3Device complexity
If refresh read operation uses the same reference voltage as normal read operation, then device complexity is reduced, but measurement precision for data condition detection is worsened
Solution Approach 1:
The patent applies different reference voltages to different operations based on their specific requirements. The first reference voltage is used for normal read operations where reading accuracy is the priority, while the second reference voltage with smaller margin is used for refresh operations where data corruption detection is the priority. This local quality approach optimizes the measurement precision for data condition detection in refresh operations without unnecessarily complicating the overall device architecture.
Data Source
AI summary
A resistive memory device comprises a memory cell array comprising a plurality of memory units. The memory device performs a refresh read operation to check a condition of each of the memory units. Then, it determines whether to refresh each memory unit based on data read by performing the refresh read operation, and refreshes the memory unit according to a result of the determination. The refresh read operation uses a reference resistance with a smaller margin from a resistance distribution than a normal read operation.


