Resistive Memory Refresh via Transition Time Monitoring

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Solution Overview

Problem

Nonvolatile memory devices using resistance materials face challenges in maintaining read reliability due to resistance drift over time, which affects the accuracy of data storage and retrieval.

Innovation Solution

Incorporating a refresh operation mechanism that includes a resistive memory cell, a reference resistor, and a refresh request signal generator to compare the transition time of the output value with a preset period, thereby generating a refresh request signal to maintain data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If resistance materials are used for nonvolatile memory storage, then data can be stored without power, but resistance drift occurs over time affecting read reliability

Engineering Contradiction:
Improvedata retention without powerVSAvoidread reliability
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The patent performs a read operation before the resistance drift significantly affects the stored value. By reading the data at an optimal time point (before drift degrades reliability), the system captures accurate data while still maintaining the nonvolatile benefit of no power required for storage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent monitors the resistance value over time and uses this feedback to determine when to perform refresh operations or to adjust read timing. By tracking resistance drift characteristics, the system can dynamically adapt its read operations to maintain high reliability despite the inherent drift problem.

Inventive Principle:
Principle #23Feedback

2Reliability

If refresh operations are implemented to compensate for resistance drift, then read reliability improves, but device complexity increases

Engineering Contradiction:
Improveread reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the memory cell's own resistance characteristics to determine when refresh is needed. By monitoring the resistance value directly at the memory cell, the system can autonomously detect drift and trigger refresh operations without requiring external complex control circuits, thus maintaining simplicity while improving reliability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Instead of continuously refreshing all memory cells, the patent performs refresh operations only on cells that show signs of significant resistance drift. This partial action approach maintains reliability for affected cells while avoiding unnecessary operations on stable cells, reducing overall system complexity.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution improves read reliability by compensating for resistance drift, ensuring consistent data storage and retrieval accuracy over time.

Implementation Method 1

resistance drift over time, which affects the accuracy of data storage and retrieval

Methodology Applied
Scientific EffectResistance drift: Electrical Resistance

Implementation Method 2

a phase-change material of a PRAM becomes a crystalline state or an amorphous state as it is cooled after being heated

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS9224441B2Nonvolatile memory device using variable resistive element and memory system having the same
Publication Date: 2015.12.29 SAMSUNG ELECTRONICS CO LTD
  • US9224441B2 patent drawing
  • US9224441B2 patent drawing
  • US9224441B2 patent drawing

AI summary

A nonvolatile memory device, which has an improved read reliability through a refresh operation, and a memory system, are provided. The nonvolatile memory device includes a resistive memory cell, a reference resistor corresponding to the resistive memory cell, a reference sense amplifier electrically connected to the reference resistor and configured to change a transition time of an output value of the reference resistor, and a refresh request signal generator configured to output the refresh request signal for the resistive memory cell when the transition time of an output value of the reference resistor is in a preset refresh requiring period.