Resistive Memory Self-Termination via Source Line Voltage Feedback
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Resistive random access memory (RRAM) faces challenges in achieving stable self-termination due to variations in temperature, voltage, and manufacturing processes, affecting the final low resistance state of memory cells.
Innovation Solution
A resistive memory with a self-termination control function, comprising a memory cell, a source line control circuit, and a current reference circuit, where a comparator compares the source line voltage with a reference voltage to determine when to terminate the write operation, ensuring accurate self-termination independent of process, voltage, and temperature variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write current is increased by current increment to switch memory cell from HRS to LRS, then the set operation is completed, but the final low resistance shifts due to temperature or manufacturing process variations
Solution Approach 1:
The patent implements a feedback mechanism where the write operation is continuously monitored through voltage sensing on the source line. The comparator compares the actual source line voltage with a reference voltage, and the termination switch automatically stops the write current when the target resistance is reached, creating a closed-loop control system that ensures precise termination independent of PVT variations
Solution Approach 2:
The self-termination circuit uses the memory cell's own resistance change to trigger the termination condition. As the resistive element transitions from HRS to LRS, the source line voltage naturally changes, and this voltage change is directly used by the comparator to determine when to terminate the write operation, eliminating the need for external control signals
2Productivity
If write termination timing varies due to temperature or manufacturing process, then the set operation completes, but the final low resistance of the memory cell shifts from target value
Solution Approach 1:
The patent dynamically adjusts the termination condition based on the actual resistance state of the memory cell. By monitoring the source line voltage which reflects the resistive element's resistance, the system adapts the write termination point to achieve the target resistance accurately regardless of initial PVT conditions, effectively changing the control parameter from fixed time to variable resistance-based termination
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables precise self-termination control, minimizing variations in the low resistance state of memory cells, thereby stabilizing the write operation and improving the reliability of RRAM.
Implementation Method 1
The comparator compares a voltage of a source line node with a reference voltage to output the comparison result
Implementation Method 2
Each memory cell of a RRAM can have its binary state, the high resistance state (HRS), and the low resistance state (LRS). The write current is applied to the selected memory cell to change the state
Data Source
AI summary
A resistive memory with a self-termination control function and a self-termination control method for a resistive memory are provided. At least one memory cell comprises a cell transistor and a resistive element. A termination switch coupled to a source line terminates a write operation according to a comparison result. The comparator compares a voltage of a source line node with a reference voltage to output the comparison result, wherein the source line node is between the at least one memory cell and the termination switch, and the voltage of the source line node responses to the resistance of the resistive element. The variable resistance circuit provides an effective resistance according to a target resistance of the resistive element and outputs a reference current. The reference voltage node is coupled to the variable resistance circuit and the comparator and receives the reference current to provide the reference voltage to the comparator.


